Limits in standard typeface are for T

(-30˚C

≤ T

J

≤ +105˚C) . Unless otherwise noted, specifications apply to the LM2770 Typical Application Circuit (pg. 1) with: V

IN

= 3.6V; V(EN) = V

Symbol

Parameter

Condition

Min

Typ

Max

Units

V

LDO-1215

LM2770-1215:

1.5V Output Voltage Regulation

- SLEEP Mode

3.0V

≤ V

IN

≤ 5.5V,

0mA

≤ I

OUT

≤ 20mA,

V

1.435

1.495

1.555

V

LM2770-1215:

1.2V Output Voltage Regulation

- SLEEP Mode

3.0V

≤ V

IN

≤ 5.5V,

0mA

≤ I

OUT

≤ 20mA,

V

1.145

1.205

1.265

V

LDO-12157

LM2770-12157:

1.575V Output Voltage

Regulation - SLEEP Mode

3.0V

≤ V

IN

≤ 5.5V,

0mA

≤ I

OUT

≤ 20mA,

V

1.520

1.575

1.630

V

LM2770-12157:

1.2V Output Voltage Regulation

- SLEEP Mode

3.0V

≤ V

IN

≤ 5.5V,

0mA

≤ I

OUT

≤ 20mA,

V

1.150

1.210

1.270

Specifications Below Apply to All LM2770 Options

E

Power Efficiency

V

V

82

%

E

AVG

Average Eficiency over Li-Ion

Input Voltage Range (Note 11)

3.0V

≤ V

IN

≤ 4.2V

I

73

%

I

Q

Quiescent Supply Current:

Full-power Mode

2.7V

≤ V

IN

≤ 5.5V

I

V(SLEEP) = 0V

55

75

µA

I

SLEEP

Quiescent Supply Current:

Sleep Mode

2.7V

≤ V

IN

≤ 5.5V

I

V(SLEEP) = 1.8V

50

65

µA

I

SD

Shutdown Current

2.7V

≤ V

IN

≤ 5.5V

V(EN) = 0V

0.1

0.5

µA

I

CL

Current Limit - Sleep Mode

0V

≤ V

OUT

≤ 0.2V

V(SLEEP) = 1.8V

60

mA

t

ON

Turn-on Time

V

200

µs

F

SW

Switching Frequency

2.7V

≤ V

IN

≤ 5.5V

475

700

925

kHz

Logic Pin Specifications: EN, ENA, ENB

V

IL

Logic-low Input Voltage

2.7V

≤ V

IN

≤ 5.5V

0

0.4

V

V

IH

Logic-high Input Voltage

2.7V

≤ V

IN

≤ 5.5V

1.0

V

IN

V

I

IH

Logic-high Input Current:

SLEEP and V

Logic Input = 3.0V

0.1

µA

I

IH-EN

Logic-high Input Current: EN pin

(Note 12)

V(EN) = 1.8V

6

µA

I

IL

Logic-low Input Current: All

Logic Pins

Logic Input = 0V

0

µA

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of

the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the

Electrical Characteristics tables.

Note 2: All voltages are with respect to the potential at the GND pin.

output may shorten the lifetime of the device.

Note 5: For detailed information on soldering requirements and recommendations, please refer to National Semiconductor’s Application Note 1187 (AN-1187):

Leadless Leadframe Package (LLP).

Note 6: The Human body model is a 100pF capacitor discharged through a 1.5k

Ω resistor into each pin. The machine model is a 200pF capacitor discharged

directly into each pin. MIL-STD-883 3015.7

www.national.com

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