2

PS8164A

09/29/00

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PI6C102

Precision Clock Synthesizer for Mobile PCs

PinDescription

SelectFunctions

ClockEnableConfiguration

#

6

6

/

0

0

1

L

E

SL

E

Sn

o

it

c

n

u

F

00

Z

-i

H

01

e

v

it

c

a

z

H

M

6

6

10

e

d

o

M

t

s

e

T

11

e

v

it

c

a

z

H

M

0

0

1

#

P

O

T

S

_

U

P

C#

P

O

T

S

_

I

C

P#

N

W

D

_

R

W

P]

1

:

0

[

K

L

C

U

P

C]

5

:

1

[

K

L

C

I

C

PF

_

K

L

C

I

C

Ps

k

c

o

l

C

r

e

h

t

Ol

a

t

s

y

r

Cs'

O

C

V

XX

0

w

o

lw

o

lw

o

ld

e

p

p

o

t

sff

off

o

00

1

w

o

lw

o

lz

H

M

3

3g

n

i

n

n

u

rg

n

i

n

n

u

rg

n

i

n

n

u

r

01

1

w

o

lz

H

M

3

3z

H

M

3

3g

n

i

n

n

u

rg

n

i

n

n

u

rg

n

i

n

n

u

r

10

1

z

H

M

6

6

/

0

0

1w

o

lz

H

M

3

3g

n

i

n

n

u

rg

n

i

n

n

u

rg

n

i

n

n

u

r

11

1

z

H

M

6

6

/

0

0

1z

H

M

3

3z

H

M

3

3g

n

i

n

n

u

rg

n

i

n

n

u

rg

n

i

n

n

u

r

n

i

Pe

m

a

N

l

a

n

g

i

Se

p

y

T.

y

t

Qn

o

it

p

ir

c

s

e

D

1N

I

_

L

A

T

XI

1

t

u

p

n

i

l

a

t

s

y

r

c

z

H

M

8

1

3

.

4

1

2T

U

O

_

L

A

T

XO

1

t

u

p

t

u

o

l

a

t

s

y

r

c

z

H

M

8

1

3

.

4

1

2

1

,

3V

I

C

P

S

S

]

1

:

0

[d

n

u

o

r

g2

st

u

p

t

u

o

k

c

o

l

c

I

C

P

r

o

f

d

n

u

o

r

G

4F

_

K

L

C

I

C

PO

1

t

u

p

t

u

o

k

c

o

l

c

I

C

P

g

n

i

n

n

u

r

e

e

r

F

1

1

,

0

1

,

8

,

7

,

5]

5

:

1

[

K

L

C

I

C

PO

5

V

3

.

3

el

b

it

a

m

o

c

L

T

T

,s

t

u

p

t

u

o

k

c

o

l

c

I

C

P

9

,

6V

I

C

P

D

D

]

1

:

0

[r

e

w

o

p2

st

u

p

t

u

o

k

c

o

l

c

I

C

P

r

o

f

r

e

w

o

P

1

2V

1

E

R

O

C

D

D

r

e

w

o

p1

e

r

o

c

r

o

f

r

e

w

o

p

d

e

t

al

o

s

I

0

2V

E

R

O

C

S

S1

d

n

u

o

r

g1

e

r

o

c

r

o

f

d

n

u

o

r

g

d

e

t

al

o

s

I

5

1#

6

6

/

0

0

1

L

E

SI

1

z

H

M

6

6

=

L

.z

H

M

0

0

1

=

H

z

H

M

6

6

r

o

z

H

M

0

0

1

g

n

il

b

a

n

e

r

o

f

n

i

p

t

c

el

e

S

6

1L

E

SI

1

t

c

el

e

S

e

d

o

M

e

v

it

c

A

r

o

t

s

e

T

7

1#

N

W

D

R

W

PI

1

W

O

L

d

l

e

h

n

e

h

w

e

ci

v

e

d

n

w

o

d

s

r

e

w

o

P

8

1#

P

O

T

S

U

P

CI

1

W

O

L

d

l

e

h

fi

W

O

L

s

k

c

o

l

c

U

P

C

s

p

o

t

S

9

1#

P

O

T

S

I

C

PI

1

W

O

L

d

l

e

h

fi

W

O

L

s

k

c

o

l

c

I

C

P

s

p

o

t

S

2

2V

U

P

C

S

S

d

n

u

o

r

g1

st

u

p

t

u

o

U

P

C

r

o

f

d

n

u

o

r

G

4

2

,

3

2]

1

:

0

[

K

L

C

U

P

CO

2

V

5

.

2

st

u

p

t

u

o

k

c

o

l

c

t

s

o

H

d

n

a

U

P

C

5

2V

U

P

C

D

D

r

e

w

o

p1

st

u

p

t

u

o

U

P

C

r

o

f

r

e

w

o

P

6

2F

E

RO

1

t

u

p

t

u

o

k

c

o

l

c

z

H

M

8

1

3

.

4

1

7

2V

F

E

R

D

D

r

e

w

o

p1

st

u

p

t

u

o

F

E

R

r

o

f

r

e

w

o

P

8

2V

F

E

R

S

S

d

n

u

o

r

g1

st

u

p

t

u

o

F

E

R

r

o

f

d

n

u

o

r

G

n

o

it

c

n

u

F

n

o

it

p

i

r

c

s

e

D

s

t

u

p

t

u

O

]

1

:

0

[

U

P

CF

I

C

P

,]

5

:

0

[

I

C

PF

E

R

Z

-i

HZ

-i

HZ

-i

HZ

-i

H

e

d

o

M

t

s

e

T2

/

K

L

C

T6

/

K

L

C

TK

L

C

T

Notes:

TCLK is a test clock over driven on he XTAL_IN inpu during test mode.