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AX-SFAZ-API Datasheet(PDF) 1 Page - ON Semiconductor |
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AX-SFAZ-API Datasheet(HTML) 1 Page - ON Semiconductor |
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1 / 20 page ![]() © Semiconductor Components Industries, LLC, 2017 April, 2017 − Rev. 1 1 Publication Order Number: AX−SFAZ/D AX-SFAZ, AX-SFAZ-API Ultra-Low Power, AT Command / API Controlled, Sigfox) Compliant Transceiver IC for Up-Link and Down-Link OVERVIEW Circuit Description AX−SFAZ and AX−SFAZ−API are ultra−low power single chip solutions for a node on the Sigfox network with both up− and down−link functionality. The AX−SFAZ chip is delivered fully ready for operation and contains all the necessary firmware to transmit and receive data from the Sigfox network in Australia/New Zealand (SIGFOX RCZ4 region). It connects to the customer product using a logic level RS232 UART. AT commands are used to send frames and configure radio parameters. The AX−SFAZ−API variant is intended for customers wishing to write their own application software based on the AX−SF−LIB−1−GEVK library. Features Functionality and Ecosystem • Sigfox up−link and down−link functionality controlled by AT commands or API • The AX−SFAZ and AX−SF−API ICs are part of a whole development and product ecosystem available from ON Semiconductor for any Sigfox requirement. Other parts of the ecosystem include ♦ Ready to go development kit DVK−SFAZ−[API]−1−GEVK including a 2 year Sigfox subscription ♦ Sigfox Ready® certified reference design for the AX−SFAZ and AX−SFAZ−API ICs General Features • QFN40 5 mm x 7 mm package • Supply range 2.7 V* − 3.6 V • −40°C to 85°C • Temperature sensor • Supply voltage measurements *Includes the RF frontend module, circuit as in Figure 5. The AX−SFAZ chip alone is operational from 1.8 V to 3.6 V, a supply voltage below 2.0 V is considered an extreme condition. • 8 GPIO pins ♦ 2 GPIO pins with selectable voltage measure functionality, differential (1 V or 10 V range) or single ended (1 V range) with 10 bit resolution ♦ 2 GPIO pins with selectable sigma delta DAC output functionality ♦ 2 GPIO pins with selectable output clock ♦ 3 GPIO pins selectable as SPI master interface ♦ RX/TX switching Control Power Consumption • Ultra−low Power Consumption: ♦ Charge required to send a Sigfox OOB packet at 24 dBm output power: 0.28 C ♦ Deepsleep mode current: 100 nA ♦ Sleep mode current: 1.3 mA ♦ Standby mode current: 0.5 mA ♦ Continuous radio RX−mode at 922.3 MHz : 34 mA ♦ Continuous radio TX−mode at 920.8 MHz 230 mA @ 24 dBm High Performance Narrow−band Sigfox RF Transceiver • Receiver ♦ Carrier frequency 922.3 MHz ♦ Data−rate 600 bps FSK ♦ Sensitivity −128 dBm @ 600 bps, 922.3 MHz, GFSK ♦ 0 dBm maximum input power • Transmitter ♦ Carrier frequency 920.8 MHz ♦ Data−rate 600 bps PSK ♦ High efficiency, high linearity integrated power amplifier ♦ Maximum output power 24 dBm Applications Sigfox networks up−link and down−link. www.onsemi.com |
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