RM4301ASEA datasheet(7/19 Pages) SAMES

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PRELIMINARY

RM4301ASEA

components. To ensure this the complete meter is protected

with an S20K420 MOV (Metal Oxide Varistor) from each

phase to neutral to clamp any high voltage potentials . A

10nF capacitor is placed in parallel with each MOV to

ensure that any parasitic inductance that can increase the

amplitude and duration of dangerous voltage spikes, is

cancelled. Each LIVE IN and NEUTRAL input is connected

directly across an MOV with the lowest possible impedance.

With the MOV and the protection capacitor in place all

extremely high voltage levels are clamped. Typically a larger

MOV can absorb more energy and will therefore be more

effective at clamping high voltage levels to protect the

SA4301A. The subsequent filtering and attenuation of the

input networks will also ensure that no damage can occur to

the SA4301A by further reducing the voltage levels that can

reach the device.

An MOV alone will not be sufficient to ensure that the

meters performance is not affected by the presence of

electromagnetic disturbances during operation. All high

frequency signal components need adequate filtering by the

filters in the current sensing networks, voltage sensing

networks and the power supply. This should ensure that the

meters performance is not affected by the presence of high

frequency signals that are directly applied (FTB test) or

induced (HF immunity test). The immunity to these types of

interference can be improved by reducing the cut-off

frequency of the filter networks. This is however only

practical to a certain point, before poor matching between

the filters on the voltage and current channels causes

linearity issues at non-unity power factor. Alternatively ferrite

beads could be used to enhance the filtering, by using them

between the SA4301A and the power supply on the VDD,

VSS and GND lines. This is however seldom necessary.

PCB DESIGN CONSIDERATIONS

There are numerous PCB design aspects to consider when

designing an energy meter using the SA4301A. These

principles have all been incorporated in the sample PCB

layout given in the “PCB Layout” section.

The first is the location of critical components. The current

and voltage sensing input resistors (RX13 and RX16 to

RX19) with their associated low pass filtering capacitors

(CX1 to CX3) should be located as close to the device pins

as possible. The same holds for the reference resistor (R3)

and the supply bypass capacitors (C10 to C12). All these

resistors should be 1% metal film resistors.

Special care is required as far as the current transformer

burden resistors are concerned. Very often the low ohmic

resistors have poor temperature coefficient which will affect

the performance of the meter. It has been found that

standard leaded resistors are more suitable for the burden

resistors than the surface mount equivalents.

The SA4301A should be placed on a solid ground plane that

is connected to the AGND pin of the device. This ground

plane should be kept clear of noise by only connecting it to

the ground plane of the power supply and the NEUTRAL

input at a single point. It should also be kept away from any

high frequency, high voltage or high current signals that may

induce noise. For example, the first section of the voltage

input attenuation network (RX0 to RX2) should be placed far

away from this ground plane. If a ferrite bead is used to

connect the rest of the meters ground to this ground plane

then identical ferrite beads must be placed into the power

supply lines (VDD and VSS) If only a single ferrite bead is

placed some signals are filtered and others are not, which

will create differential noise between the unfiltered and the

filtered signals. This will affect the performance of the

SA4301A in the presence of electromagnetic disturbance.

As far as the immunity to electromagnetic interference is

concerned the guideline is simply to minimize the parasitic

inductance. Each PCB net has a parasitic inductance and if

this is not sufficiently small it could cause resonance with

the parasitic capacitance at low enough frequencies to

affect the performance on the HF interference test or the

FTB test. Keeping the PCB tracks as short as possible is

one method to avoid this scenario. Parasitic inductance is

also a factor that can render the MOV almost useless

because a voltage spike can be amplified in both magnitude

and duration by series inductance. The capacitor in parallel

with the MOV cancels some of this inductance but still all

possible measures to avoid parasitic inductance should be

adhered to.

DETAIL DESIGN

The detailed specifications are:

Nominal voltage: VNOM = 220V

Maximum current: IMAX = 60A

Basic current:

Ib = 10A

Mains frequency: fMains = 50Hz

CT:

NCT = 1000, fCT = 0.09º

Pulse constant:

800imp/kWh

Motor constant:

100imp/kWh

Using the design equations derived earlier:

equation(1):

RB = 0.83W ≈ 1.2W (readily available)

equation(2):

RC ≈ 2.2kW

equation(3):

Target fCI,-3dB = 10kHz for best immunity and

so CC ≈ 15nF

equation(6):

fII = -0.297º

equation(7):

fIV = -0.207º

equation(8):

RX12 ≈ 750

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