PIC16F73-ESLASHSS datasheet(55/174 Pages) MICROCHIP

55 / 174 page

 2002 Microchip Technology Inc.

DS30325B-page 53

PIC16F7X

8.0

CAPTURE/COMPARE/PWM

MODULES

Each Capture/Compare/PWM (CCP) module contains

a 16-bit register which can operate as a:

• 16-bit Capture register

• 16-bit Compare register

• PWM Master/Slave Duty Cycle register

Both the CCP1 and CCP2 modules are identical in

operation, with the exception being the operation of the

special event trigger. Table 8-1 and Table 8-2 show the

resources and interactions of the CCP module(s). In

the following sections, the operation of a CCP module

is described with respect to CCP1. CCP2 operates the

same as CCP1, except where noted.

8.1

CCP1 Module

Capture/Compare/PWM Register1 (CCPR1) is com-

prised of two 8-bit registers: CCPR1L (low byte) and

CCPR1H (high byte). The CCP1CON register controls

the operation of CCP1. The special event trigger is

generated by a compare match and will clear both

TMR1H and TMR1L registers.

8.2

CCP2 Module

Capture/Compare/PWM Register1 (CCPR1) is com-

prised of two 8-bit registers: CCPR1L (low byte) and

CCPR1H (high byte). The CCP2CON register controls

the operation of CCP2. The special event trigger is

generated by a compare match; it will clear both

TMR1H and TMR1L registers, and start an A/D conver-

sion (if the A/D module is enabled).

Additional information on CCP modules is available in

the PICmicro™ Mid-Range MCU Family Reference

Manual (DS33023) and in Application Note AN594,

“Using the CCP Modules” (DS00594).

TABLE 8-1:

CCP MODE - TIMER

RESOURCES REQUIRED

TABLE 8-2:

INTERACTION OF TWO CCP MODULES

CCP Mode

Timer Resource

Capture

Compare

PWM

Timer1

Timer2

CCPx Mode CCPy Mode

Interaction

Capture

Same TMR1 time-base.

Capture

Compare

Same TMR1 time-base.

Compare

Same TMR1 time-base.

PWM

The PWMs will have the same frequency and update rate (TMR2 interrupt).

The rising edges are aligned.

PWM

Capture

None.

PWM

Compare

None.

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