| Manufacturer | Part # | Datasheet | Description |
 ON Semiconductor |
MC100LVEL39DWR2G
|
120Kb/6P
|
3.3V ECL 첨2/4, 첨4/6 Clock Generation Chip
November, 2006 ??Rev. 9
|
|
MC100LVEL39DWR2G
|
160Kb/6P
|
3.3V ECL Clock Generation Chip
July, 2016 ??Rev. 11
|
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 ON Semiconductor |
MC100LVEL39DWR2
|
120Kb/6P |
3.3V ECL 첨2/4, 첨4/6 Clock Generation Chip
November, 2006 ??Rev. 9 |
|
MC100LVEL39DWG
|
120Kb/6P |
3.3V ECL 첨2/4, 첨4/6 Clock Generation Chip
November, 2006 ??Rev. 9 |
 Motorola, Inc |
MC100LVEL39DW
|
127Kb/4P |
첨2/4,첨4/6 Clock Generation Chip
|
 ON Semiconductor |
MC100LVEL39DW
|
120Kb/6P |
3.3V ECL 첨2/4, 첨4/6 Clock Generation Chip
November, 2006 ??Rev. 9 |
|
MC100LVEL39
|
160Kb/6P |
3.3V ECL Clock Generation Chip
July, 2016 ??Rev. 11 |
|
MC100LVEL30
|
102Kb/3P |
Triple D Flip-Flop With Set and Reset
1996 REV 2 |
|
MC100LVEL30
|
114Kb/6P |
3.3V ECL Triple D Flip?묯lop with Set and Reset
November, 2006 ??Rev. 7 |
|
MC100LVEL30DW
|
114Kb/6P |
3.3V ECL Triple D Flip?묯lop with Set and Reset
November, 2006 ??Rev. 7 |
|
MC100LVEL30DWG
|
114Kb/6P |
3.3V ECL Triple D Flip?묯lop with Set and Reset
November, 2006 ??Rev. 7 |
|
MC100LVEL30DWG
|
145Kb/6P |
ECL Triple D Flip?륡lop with Set and Reset
July, 2016 ??Rev. 8 |
|
MC100LVEL30DWR2
|
114Kb/6P |
3.3V ECL Triple D Flip?묯lop with Set and Reset
November, 2006 ??Rev. 7 |
|
MC100LVEL30DWR2G
|
114Kb/6P |
3.3V ECL Triple D Flip?묯lop with Set and Reset
November, 2006 ??Rev. 7 |
|
MC100LVEL30DWR2G
|
145Kb/6P |
ECL Triple D Flip?륡lop with Set and Reset
July, 2016 ??Rev. 8 |
|
MC100LVEL30
|
114Kb/6P |
3.3V ECL Triple D Flip?묯lop with Set and Reset
November, 2006 ??Rev. 7 |
|
MC100LVEL30
|
145Kb/6P |
ECL Triple D Flip?륡lop with Set and Reset
July, 2016 ??Rev. 8 |
|
MC100LVEL31
|
59Kb/4P |
D Flip-Flop With Set and Reset
1996 REV 0 |
|
MC100LVEL31
|
136Kb/8P |
3.3V ECL D Flip-Flop with Set and Reset
December, 2006 ??Rev. 3 |
|
MC100LVEL31D
|
136Kb/8P |
3.3V ECL D Flip-Flop with Set and Reset
December, 2006 ??Rev. 3 |