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C8051F96X Datasheet (PDF) - Silicon Laboratories

C8051F96X Datasheet PDF - Silicon Laboratories
Part # C8051F96X
Download  C8051F96X Download
File Size   9733.49 Kbytes
Page   492 Pages
Manufacturer  SILABS [Silicon Laboratories]
Direct Link  http://www.silabs.com
Logo SILABS - Silicon Laboratories
Description Ultra Low Power 128K, LCD MCU Family

C8051F96X Datasheet (PDF)

Go To PDF Page Download Datasheet
C8051F96X Datasheet PDF - Silicon Laboratories

Part # C8051F96X
Download  C8051F96X Click to download

File Size   9733.49 Kbytes
Page   492 Pages
Manufacturer  SILABS [Silicon Laboratories]
Direct Link  http://www.silabs.com
Logo SILABS - Silicon Laboratories
Description Ultra Low Power 128K, LCD MCU Family

C8051F96X Datasheet (HTML) - Silicon Laboratories


C8051F96X Product details

Ultra Low Power Consumption at 3.6 V
-130 μA/MHz Low-Power Active mode with dc-dc enabled
-120 nA sleep current w/ data retention; POR monitor enabled
-450 nA sleep mode with SmaRTClock
(internal LFO)
-600 nA sleep mode with SmaRTClock (ext. crystal)
-2 μs wakeup time; 1.5 μA analog settling time
12-Bit; 16 Ch. Analog-to-Digital Converter
-Up to 75 ksps (12-bit mode) or 300 ksps
(10-bit mode)
-External pin or internal VREF (no ext cap required)
-On-chip voltage reference; 0.5x gain allows measuring voltages up to twice the reference voltage
-Autonomous burst mode with 16-bit auto-averaging accumulator
-Integrated temperature sensor
Two Low Current Comparators
-Programmable hysteresis and response time
-Configurable as wake-up or reset source
Internal 6-Bit Current Reference
-Up to ±500 μA; source and sink capability
-Enhanced resolution via PWM interpolation
Integrated LCD Controller
-Supports up to 128 segments (32x4)
-LCD controller consumes only 400 nA for
32-segment static display
-Integrated charge pump for contrast control
Metering-Specific Peripherals
-DC-DC buck converter allows dynamic voltage scaling for maximum efficiency (250 mW output)
-Sleep-mode pulse accumulator with programmable switch, de-bounce and pull-up control; interfaces directly to metering sensor
-Data Packet Processing Engine (DPPE) includes hardware AES, DMA, CRC and encoding blocks for acceleration of wireless protocols
High-Speed 8051 μC Core
-Pipelined instruction architecture; executes 70% of instructions in 1 or 2 system clocks
Memory
-Up to 128 kB Flash; In-system programmable; Full read/write/erase functionality over supply range
-Up to 8 kB internal data RAM
Digital Peripherals
-57 or 34 port I/O; All 5 V tolerant with high sink
current and programmable drive strength
-Hardware SMBus™ (I2C™ Compatible), 2 x SPI™, and UART serial ports available concurrently
-Four general purpose 16-bit counter/timers
-Programmable 16-bit counter/timer array with six capture/compare modules and watchdog timer
Clock Sources
-Precision Internal oscillator: 24.5 MHz, 2% accuracy supports UART operation; spread-spectrum mode for reduced EMI
-Low power internal oscillator: 20 MHz
-External oscillator: Crystal, RC, C, or CMOS Clock
-SmaRTClock oscillator: 32 kHz Crystal or 16.4 kHz internal LFO
On-Chip Debug
-On-chip debug circuitry facilitates full-speed, non-intrusive in-system debug (no emulator required)
-Provides 4 breakpoints, single stepping
Packages
-76-pin DQFN (6 x 6 mm)
-40-pin QFN (6 x 6 mm)
-80-pin TQFP (12 x 12 mm)
Temperature Range: –40 to +85 °C




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