55111IRZ Marking, ISL55111IRZ datasheet(13/19 Pages) RENESAS

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ISL55110, ISL55111

FN6228 Rev 9.0

Page 13 of 18

Apr 29, 2021

Detailed Description

The ISL55110 and ISL55111 are dual high-speed MOSFET

drivers intended for applications requiring accurate pulse

generation and buffering. Target applications include ultrasound,

CCD imaging, automotive piezoelectric distance sensing and

clock generation circuits.

With a wide output voltage range and low ON-resistance, these

devices can drive a variety of resistive and capacitive loads with

fast rise and fall times, allowing high-speed operation with low

skew as required in large CCD array imaging applications.

The ISL55110 and ISL55111 are compatible with 3.3V and 5V

logic families and incorporate tightly controlled input thresholds

to minimize the effect of input rise time on output pulse width.

The ISL55110 has a pair of in-phase drivers while the ISL55111

has two drivers operating in anti-phase. Both channels of the

device have independent inputs to allow external time phasing if

required.

In addition to driving power MOSFETs, the ISL55110 and

ISL55111 are well suited for other applications such as bus,

control signal and clock drivers for large memory arrays on

microprocessor boards, where the load capacitance is large and

low propagation delays are required. Other potential applications

include peripheral power drivers and charge pump voltage

inverters.

Input Stage

The input stage is a high impedance buffer with rise/fall

hysteresis. This means that the inputs will be directly compatible

with both TTL and lower voltage logic over the entire VDD range.

The user should treat the inputs as high-speed pins and keep rise

and fall times to <2ns.

Output Stage

The ISL55110 and ISL55111 outputs are high-power CMOS

drivers swinging between ground and VH. At VH = 12V, the output

impedance of the inverter is typically 3.0Ω. The high peak current

capability of the ISL55110 and ISL55111 enables it to drive a

330pF load to 12V with a rise time of <3.0ns over the full

temperature range. The output swing of the ISL55110 and

ISL55111 comes within <30mV of the VH and Ground rails.

Application Notes

Although the ISL55110 and ISL55111 are simply dual level

shifting drivers, there are several areas to which careful attention

must be paid.

Grounding

Since the input and the high current output current paths both

include the ground pin, it is very important to minimize any

common impedance in the ground return. Since the ISL55111

has one inverting input, any common impedance will generate

negative feedback and may degrade the delay times and rise

and fall times. Use a ground plane if possible or use separate

ground returns for the input and output circuits. To minimize any

common inductance in the ground return, separate the input and

output circuit ground returns as close to the ISL55110 and

ISL55111 as possible.

Bypassing

The rapid charging and discharging of the load capacitance

requires very high current spikes from the power supplies. A

parallel combination of capacitors, which have a low impedance

over a wide frequency range should be used. A 4.7µF tantalum

capacitor in parallel with a low inductance 0.1µF capacitor is

usually sufficient bypassing.

Output Damping

Ringing is a common problem in any circuit with very fast rise or

fall times. Such ringing will be aggravated by long inductive lines

with capacitive loads. Techniques to reduce ringing include:

1. Reduce inductance by making printed circuit board traces as

short as possible.

2. Reduce inductance by using a ground plane or by closely

coupling the output lines to their return paths.

3. Use small damping resistor in series with the output of the

ISL55110 and ISL55111. Although this reduces ringing, it will

also slightly increase the rise and fall times.

4. Use good bypassing techniques to prevent supply voltage

ringing.

Power Dissipation Calculation

The Power dissipation equation has three components:

1. Quiescent power dissipation.

2. Power dissipation due to internal parasitics.

3. Power dissipation because of the load capacitor.

Power dissipation due to internal parasitics is usually the most

difficult to accurately quantitize. This is primarily due to crowbar

current which is a product of both the high and low drivers

conducting effectively at the same time during driver transitions.

Design goals always target the minimum time for this condition

to exist. Given that how often this occurs is a product of

frequency, crowbar effects can be characterized as internal

capacitance.

Lab tests are conducted with driver outputs disconnected from

any load. With design verification packaging, bond wires are

removed to aid in the characterization process. Based on

laboratory tests and simulation correlation of those results,

Equation 1 defines the ISL55110 and ISL55111 power

dissipation per channel:

• Where 3.3mA is the quiescent current from the VDD. This

forms a small portion of the total calculation. When figuring

two channel power consumption, only include this current

once.

• 10pF is the approximate parasitic capacitor (inverters, etc.),

which the VDD drives.

• 135pF is the approximate parasitic at the DOUT and its buffers.

This includes the effect of the crowbar current.

•CL is the load capacitor being driven.

PVDD 3.3e-3



10pF VDD



135pF VH



 +

(EQ. 1)

CL VH



(Watts/Channel)

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