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HT36A2 Datasheet(PDF) 13 Page - Holtek Semiconductor Inc |
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HT36A2 Datasheet(HTML) 13 Page - Holtek Semiconductor Inc |
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13 / 24 page  HT36A2 Rev. 1.00 13 June 19, 2003 To guarantee that the system oscillator has started and stabilized, the SST (System Start-up Timer) provides an extra-delay of 1024 system clock pulses during system power up or when the system awakes from a HALT state. When a system power-up occurs, the SST delay is added during the reset period. But when the reset co- mes from the RES pin, the SST delay is disabled. Any wake-up from HALT will enable the SST delay. The functional units chip reset status are shown below. Program counter 000H Interrupt Disable Prescaler Clear WDT Clear. After master reset, WDT begins counting Timer Counter (0/1) Off Input/output ports Input mode SP Points to the top of stack The registers status is summarized in the following table: Register Reset (Power On) WDT Time-out (Normal Operation) RES Reset (Normal Operation) RES Reset (HALT) WDT Time-out (HALT)* Program Counter 0000H 0000H 0000H 0000H 0000H MP0 xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu MP1 xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu ACC xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu TBLP xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu TBLH xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu WDTS 0000 0111 0000 0111 0000 0111 0000 0111 uuuu uuuu STATUS --00 xxxx --1u uuuu --uu uuuu --01 uuuu --11 uuuu INTC -000 0000 -000 0000 -000 0000 -000 0000 -uuu uuuu TMR0L xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu TMR0C 00-0 1000 00-0 1000 00-0 1000 00-0 1000 uu-u 1uuu TMR1L xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu TMR1C 00-0 1000 00-0 1000 00-0 1000 00-0 1000 uu-u 1uuu PA 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu PAC 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu PB 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu PBC 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu PC ---- 1111 ---- 1111 ---- 1111 ---- 1111 ---- uuuu PCC ---- 1111 ---- 1111 ---- 1111 ---- 1111 ---- uuuu PF ---- -000 ---- -000 ---- -000 ---- -000 ---- -uuu CHAN 00-- -000 uu-- -uuu uu-- -uuu uu-- -uuu uu-- -uuu FreqNH xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu FreqNL xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu AddrH ---- xxxx ---- uuuu ---- uuuu ---- uuuu ---- uuuu AddrL xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu ReH ---- --xx ---- --uu ---- --uu ---- --uu ---- --uu ReL xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu VolH ---- xxxx ---- uuuu ---- uuuu ---- uuuu ---- uuuu VolL xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu DAC ---- --00 ---- --00 ---- --00 ---- --00 ---- --uu Note: ²*² stands for warm reset ²u² stands for unchanged ²x² stands for unknown ²-² stands for unused |
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