FDMF6705 datasheet(5/21 Pages) ONSEMI

5 / 21 page

www.fairchildsemi.com

FDMF6705 • Rev. 1.0.4

Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be

operable above the recommended operating conditions and stressing the parts to these levels is not recommended.

In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.

The absolute maximum ratings are stress ratings only.

Symbol

Parameter

Min.

Max.

Unit

VCIN, VDRV, DISB#, PWM, SMOD#, GL, THWN# to CGND Pins

-0.3

6.0

VIN to PGND, CGND Pins

-0.3

30.0

BOOT, GH to VSWH, PHASE Pins

-0.3

6.0

BOOT, PHASE, GH to CGND Pins

-0.3

30.0

VSWH to CGND/PGND (DC Only)

-0.3

30.0

VSWH to PGND (<20 ns)

-8.0

33.0

BOOT to VDRV

22.0

BOOT to VDRV (<20 ns)

25.0

ITHWN#

THWN# Sink Current

-0.1

7.0

IO(AV)

(1)

VIN=19 V, VO=1.0 V

fSW=300 kHz

fSW=1 MHz

θJPCB

Junction-to-PCB Thermal Resistance

3.5

°C/W

Ambient Temperature Range

-40

+125

°C

Maximum Junction Temperature

+150

°C

TSTG

Storage Temperature Range

-55

+150

°C

ESD

Electrostatic Discharge Protection

Human Body Model, JESD22-A114

2000

Charged Device Model, JESD22-C101

1000

Note:

IO(AV) is rated using Fairchild’s DrMOS evaluation board, TA = 25°C, natural convection cooling. This rating is limited

by the peak DrMOS temperature, TJ = 150°C, and varies depending on operating conditions and PCB layout. This

rating can be changed with different application settings.

Recommended Operating Conditions

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended

operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not

recommend exceeding them or designing to Absolute Maximum Ratings.

Symbol

Parameter

Min.

Typ.

Max.

Unit

VCIN

Control Circuit Supply Voltage

4.5

5.0

5.5

VDRV

Gate Drive Circuit Supply Voltage

4.5

5.0

5.5

VIN

Output Stage Supply Voltage

3.0

12.0

24.0

(2)

Note:

Operating at high VIN can create excessive AC overshoots on the VSWH-to-GND and BOOT-to-GND nodes

during MOSFET switching transients. For reliable DrMOS operation, VSWH-to-GND and BOOT-to-GND must

remain at or below the Absolute Maximum Ratings shown in the table above. Refer to the “Application

Information” and “PCB Layout Guidelines” sections of this datasheet for additional information.

FDMF6705 Datasheet(PDF) 5 Page - ON Semiconductor

FDMF6705 Datasheet(HTML) 5 Page - ON Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21

Datasheet Download

Link URL