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SLG59H1007V Datasheet(PDF) 12 Page - Dialog Semiconductor |
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SLG59H1007V Datasheet(HTML) 12 Page - Dialog Semiconductor |
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12 / 20 page ![]() 000-0059H1007-100 Page 12 of 20 SLG59H1007V Applications Information HFET1 Safe Operating Area Explained Silego’s HFET1 integrated power controllers incorporate a number of internal protection features that prevents them from damaging themselves or any other circuit or subcircuit downstream of them. One particular protection feature is their Safe Operation Area (SOA) protection. SOA protection is automatically activated under overpower and, in some cases, under overcurrent conditions. Overpower SOA is activated if package power dissipation exceeds an internal 5W threshold longer than 2.5 ms. HFET1 devices will quickly switch off (open circuit) upon overpower detection and automatically resume (close) nominal operation once overpower condition no longer exists. One possible way to have an overpower condition trigger SOA protection is when HFET1 products are enabled into heavy output resistive loads and/or into large load capacitors. It is under these conditions to follow carefully the “Safe Start-up Loading” guidance in the Applications section of the datasheet. During an overcurrent condition, HFET1 devices will try to limit the output current to the level set by the external RSET resistor. Limiting the output current, however, causes an increased voltage drop across the FET’s channel because the FET’s RDSON increased as well. Since the FET’s RDSON is larger, package power dissipation also increases. If the resultant increase in package power dissipation is higher/equal than 5 W for longer than 2.5 ms, internal SOA protection will be triggered and the FET will open circuit (switch off). Every time SOA protection is triggered, all HFET1 devices will automatically attempt to resume nominal operation after 160 ms. Safe Start-up Condition SLG59H1007V has built-in protection to prevent over-heating during start-up into a heavy load. Overloading the VOUT pin with a capacitor and a resistor may result in non-monotonic VOUT ramping. In general, under light loading on VOUT, VOUT ramping can be controlled with CSLEW value. The following equation serves as a guide: where TRAMP = Total ramping time for VOUT to reach VIN VIN = Input Voltage CSLEW = Capacitor value for CAP pin When capacitor and resistor loading on VOUT during start up, the following tables will ensure VOUT ramping is monotonic without triggering internal protection: Safe Start-up Loading for VIN = 22 V (Monotonic Ramp) Slew Rate (V/ms) CSLEW Control (nF)3 CLOAD (μF) RLOAD (Ω) 0.5 66.7 500 80 1.0 33.3 250 80 1.5 22.2 160 80 2.0 16.7 120 80 2.5 13.3 100 80 CSLEW = TRAMP VIN x 5 μA x 20 3 |
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