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X4643 Datasheet(PDF) 1 Page - Xicor Inc.

Part # X4643
Description  CPU Supervisor with 64K EEPROM
PDF  22 Pages
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Manufacturer  XICOR [Xicor Inc.]
Direct Link  http://www.xicor.com
Logo XICOR - Xicor Inc.

X4643 Datasheet(HTML) 1 Page - Xicor Inc.

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REV 1.26 4/30/02
Characteristics subject to change without notice.
1 of 22
www.xicor.com
Preliminary Information
64K
X4643/5
8K x 8 Bit
CPU Supervisor with 64K EEPROM
FEATURES
• Selectable watchdog timer
•Low VCC detection and reset assertion
—Four standard reset threshold voltages
—Adjust low VCC reset threshold voltage using
special programming sequence
—Reset signal valid to VCC = 1V
• Low power CMOS
—<20µA max standby current, watchdog on
—<1µA standby current, watchdog off
—3mA active current
• 64Kbits of EEPROM
—64-byte page write mode
—Self-timed write cycle
—5ms write cycle time (typical)
• Built-in inadvertent write protection
—Power-up/power-down protection circuitry
• 400kHz 2-wire interface
• 2.7V to 5.5V power supply operation
• Available packages
—8-lead SOIC
—8-lead TSSOP
DESCRIPTION
The X4643/5 combines four popular functions, Power-on
Reset Control, Watchdog Timer, Supply Voltage
Supervision, and Serial EEPROM Memory in one
package. This
combination
lowers
system
cost,
reduces board space requirements, and increases reli-
ability.
Applying power to the device activates the power on
reset circuit which holds RESET/RESET active for a
period of time. This allows the power supply and oscilla-
tor to stabilize before the processor can execute code.
The Watchdog Timer provides an independent protection
mechanism for microcontrollers. When the microcon-
troller fails to restart a timer within a selectable time out
interval, the device activates the RESET/RESET signal.
The user selects the interval from three preset values.
Once selected, the interval does not change, even after
cycling the power.
The device’s low VCC detection circuitry protects the
user’s system from low voltage conditions, resetting the
system when VCC falls below the set minimum VCC trip
point. RESET/RESET is asserted until VCC returns to
proper operating level and stabilizes. Four industry
BLOCK DIAGRAM
Watchdog
Timer Reset
Data
Register
Command
Decode &
Control
Logic
SDA
SCL
VCC
Reset &
Watchdog
Timebase
Power on and
Generation
VTRIP
+
-
RESET (X4643/5)
Reset
Low Voltage
Status
Register
Protect Logic
EEPROM Array
Watchdog Transition
Detector
WP
VCC Threshold
Reset Logic
RESET (X4645)
S0
S1


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