AD7760BCP datasheet(16/22 Pages) AD

16 / 22 page

AD7760

Preliminary Technical Data

Rev. PrN | Page 16 of 22

USING THE AD7760

The following is the recommended sequence for powering up

and using the AD7760.

Apply Power

Start clock oscillator, applying MCLK

Take RESET low for a minimum of 1 MCLK cycle

Wait a minimum of 2 MCLK cycles after RESET has

been released.

Write to Control Register 2 to power up the ADC and

the differential amplifiers as required. The correct

Clock Divider (CDIV[1:0]) ratio should be

programmed here also.

Write to Control Register 1 to set up the Output Data

Rate.

Take SYNC low for a minimum of 2 MCLK cycles.

Data can now be read from the part using the default filter,

offset, gain and over range threshold values. The

conversion data read will not be valid however until the

group delay of the filter has passed. When this has

occurred, the DVALID bit read with the data LSW will be

set indicating that the data is indeed valid.

The user can now download their own filter if required

(see Downloading a User-Defined Filter). Values for gain,

offset and over range threshold registers can be written or

read at this stage. An internal calibration sequence can also

be initiated at this point.

BIAS RESISTOR SELECTION

The AD7760 requires a resistor to be connected between the

RBIAS pin and AGND. The value for this resistor is dependant on

the reference voltage being applied to the device. The resistor

value should be selected to give a current of 25µA through the

resistor to ground. For a 2.5V reference voltage, the correct

resistor value is 100kΩ and for a 4.096V reference, 160kΩ.

AD7760BCP Datasheet(PDF) 16 Page - Analog Devices