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MB9B320TA Datasheet(PDF) 53 Page - Cypress Semiconductor |
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MB9B320TA Datasheet(HTML) 53 Page - Cypress Semiconductor |
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53 / 143 page ![]() Document Number: 002-05665 Rev. *D Page 52 of 142 MB9B320TA Series Pin function Pin name Function description Pin No LQFP-176 LQFP-144 BGA-192 GND VSS GND Pin 27 25 A5 44 36 A8 53 45 A11 88 72 E1 132 108 G7 157 127 G8 176 144 H8 - - M1 - - P3 - - P7 - - N7 - - M7 - - L7 - - K7 - - J7 - - P11 - - N14 - - L14 - - B14 - - H7 - - B1 - - G1 - - J1 Clock X0 Main clock (oscillation) input pin 86 70 P12 X0A Sub clock (oscillation) input pin 55 47 P5 X1 Main clock (oscillation) I/O pin 87 71 P13 X1A Sub clock (oscillation) I/O pin 56 48 P6 CROUT_0 Built-in high-speed CR-osc clock output port 127 103 D13 CROUT_1 152 122 E8 Analog Power AVCC A/D converter, D/A converter analog power pin 114 90 J14 AVRH A/D converter analog reference voltage input pin 117 93 F14 Analog GND AVSS A/D converter, D/A converter GND pin 115 91 H14 AVRL A/D converter analog reference voltage input pin 116 92 G14 C pin C Power supply stabilization capacity pin 52 44 P2 *: 5V tolerant I/O Note: − While this device contains a Test Access Port (TAP) based on the IEEE 1149.1-2001 JTAG standard, it is not fully compliant to all requirements of that standard. This device may contain a 32-bit device ID that is the same as the 32-bit device ID in other devices with different functionality. The TAP pins may also be configurable for purposes other than access to the TAP controller. |
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