MB9B320TA datasheet(2/143 Pages) CYPRESS

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MB9B320TA Series

32-bit Arm® Cortex®-M3

FM3 Microcontroller

Cypress Semiconductor Corporation

•

198 Champion Court

•

San Jose

, CA 95134-1709

•

408-943-2600

Document Number: 002-05665 Rev. *D

Revised January 12, 2018

The MB9B320TA Series are highly integrated 32-bit microcontrollers dedicated for embedded controllers with low-power

consumption mode and competitive cost.

These series are based on the Arm® Cortex®-M3 Processor with on-chip Flash memory and SRAM, and have peripheral functions

such as various timers, ADCs, DACs and Communication Interfaces (USB, UART, CSIO, I2C, LIN).

The products which are described in this data sheet are placed into TYPE12 product categories in "FM3 Family PERIPHERAL

MANUAL".

Features

32-bit Arm® Cortex®-M3 Core

Processor version: r2p1

Up to 60 MHz Frequency Operation

Integrated Nested Vectored Interrupt Controller (NVIC): 1

NMI (non-maskable interrupt) and 48 peripheral interrupts

and 16 priority levels

24-bit System timer (Sys Tick): System timer for OS task

management

On-chip Memories

[Flash memory]

Dual operation Flash memory



Main area:

• Up to 1.5 Mbytes (1008 Kbytes(ROM0) + 512 Kbytes

(ROM1) of Upper bank and 16 Kbytes(ROM0) of Lower

bank.)



Work area

• 64 Kbytes(ROM1) of Lower bank

Read cycle: 0 wait-cycle

Security function for code protection

[SRAM]

This Series on-chip SRAM is composed of two independent

SRAM (SRAM0, SRAM1). SRAM0 is connected to I-code bus

and D-code bus of Cortex-M3 core. SRAM1 is connected to

System bus.

SRAM0: Up to 96 Kbytes

SRAM1: Up to 96 Kbytes

External Bus Interface

Supports SRAM, NOR NAND Flash memory device

Up to 8 chip selects

8-/16-bit Data width

Up to 25-bit Address bit

Maximum area size: Up to 256 Mbytes

Supports Address/Data multiplex

Supports external RDY function

USB Interface

The USB interface is composed of Device and Host.

PLL for USB is built-in, USB clock can be generated by

multiplication of Main clock.

[USB Device]

USB2.0 Full-Speed supported

Max 6 EndPoint supported



EndPoint 0 is control transfer



EndPoint 1, 2 can select Bulk-transfer, Interrupt-transfer or

Isochronous-transfer



EndPoint 3 to 5 can select Bulk-transfer or

Interrupt-transfer



EndPoint 1 to 5 are comprised of Double Buffers.



The size of each EndPoint is as follows.

• EndPoint 0, 2 to 5:64 bytes

• EndPoint 1: 256 bytes

[USB host]

USB2.0 Full/Low-speed supported

Bulk-transfer, interrupt-transfer and Isochronous-transfer

support

USB Device connected/dis-connected automatic detection

Automatic processing of the IN/OUT token handshake

packet

Max 256-byte packet-length supported

Wake-up function supported

MB9B320TA Datasheet(PDF) 2 Page - Cypress Semiconductor

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