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PIC16F818-E/ML Datasheet(PDF) 102 Page - Microchip Technology |
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PIC16F818-E/ML Datasheet(HTML) 102 Page - Microchip Technology |
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102 / 176 page ![]() PIC16F818/819 DS39598E-page 100 2004 Microchip Technology Inc. FIGURE 12-9: WAKE-UP FROM SLEEP THROUGH INTERRUPT 12.14 In-Circuit Debugger When the DEBUG bit in the Configuration Word is programmed to a ‘0’, the In-Circuit Debugger function- ality is enabled. This function allows simple debugging functions when used with MPLAB® ICD. When the microcontroller has this feature enabled, some of the resources are not available for general use. Table 12-6 shows which features are consumed by the background debugger. TABLE 12-6: DEBUGGER RESOURCES To use the In-Circuit Debugger function of the micro- controller, the design must implement In-Circuit Serial Programming connections to MCLR/VPP, VDD, GND, RB7 and RB6. This will interface to the in-circuit debugger module available from Microchip or one of the third party development tool companies. 12.15 Program Verification/Code Protection If the code protection bit(s) have not been programmed, the on-chip program memory can be read out for verification purposes. 12.16 ID Locations Four memory locations (2000h-2003h) are designated as ID locations, where the user can store checksum or other code identification numbers. These locations are not accessible during normal execution but are readable and writable during program/verify. It is recommended that only the four Least Significant bits of the ID location are used. Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 OSC1 CLKO(4) INT pin INTF Flag (INTCON<1>) GIE bit (INTCON<7>) INSTRUCTION FLOW PC Instruction Fetched Instruction Executed PC PC + 1 PC + 2 Inst(PC) = Sleep Inst(PC – 1) Inst(PC + 1) Sleep Processor in Sleep Interrupt Latency (Note 2) Inst(PC + 2) Inst(PC + 1) Inst(0004h) Inst(0005h) Inst(0004h) Dummy Cycle PC + 2 0004h 0005h Dummy Cycle TOST(2) PC + 2 Note 1: XT, HS or LP Oscillator mode assumed. 2: TOST = 1024 TOSC (drawing not to scale). This delay will not be there for RC Oscillator mode. 3: GIE = 1 assumed. In this case, after wake-up, the processor jumps to the interrupt routine. If GIE = 0, execution will continue in-line. 4: CLKO is not available in these oscillator modes but shown here for timing reference. I/O pins RB6, RB7 Stack 1 level Program Memory Address 0000h must be NOP Last 100h words Data Memory 0x070 (0x0F0, 0x170, 0x1F0) 0x1EB-0x1EF |
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