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74LVCV2G66DP Datasheet(PDF) 3 Page - NXP Semiconductors |
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74LVCV2G66DP Datasheet(HTML) 3 Page - NXP Semiconductors |
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3 / 23 page ![]() 9397 750 13027 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 — 2 April 2004 3 of 23 Philips Semiconductors 74LVCV2G66 Overvoltage tolerant bilateral switch 6. Functional diagram 7. Pinning information 7.1 Pinning 7.2 Pin description Fig 1. Logic symbol. Fig 2. IEC logic symbol. Fig 3. Logic diagram. 001aaa530 2Y 2E 2Z 1Z 1Y 1E 001aaa531 2 1 1 X1 1 1 X1 7# # 1 6 3 5 001aaa532 Y VCC Z E Fig 4. Pin configuration. 66 1Z VCC 1Y 1E 2E 2Y GND 2Z 001aaa529 1 2 3 4 6 5 8 7 Table 4: Pin description Pin Symbol Description 1 1Z independent input/output (overvoltage tolerance) 2 1Y independent input/output 3 2E enable input (active HIGH) 4 GND ground (0 V) 5 2Z independent input/output (overvoltage tolerance) |
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