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ACT4529M Datasheet(PDF) 10 Page - Active-Semi, Inc |
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ACT4529M Datasheet(HTML) 10 Page - Active-Semi, Inc |
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10 / 15 page ![]() ACT4529M Rev 1, 23-Feb-17 Innovative PowerTM - 10 - www.active-semi.com Copyright © 2016-2017 Active-Semi, Inc. APPLICATIONS INFORMATION PCB Layout Guidance When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the IC. 1) Arrange the power components to reduce the AC loop size consisting of CIN, IN pin, SW pin, the Schottky diode, and GND 2) Place input decoupling ceramic capacitor CIN as close to VIN pin as possible. The GND side of CIN must be placed as close as possible to to power GND on the top layer. The traces should be short and wide. 3) The high power loss components, e.g. the controller, Schottky diode, and the inductor should be placed carefully to make the thermal spread evenly on the board. 4) Schottky anode pad and IC exposed pad should be placed close to ground clips in CLA applications 5) Use “Kelvin” or “4-wire” connection techniques from the sense resistor pads directly to the CSP and CSN pins. The CSP and CSN traces should be in parallel to avoid interference. 6) Place multiple vias between top and bottom GND planes for best heat dissipation and noise immunity. 7) Use short traces connecting HSB-CHSB-SW loop. 8) SW node is noisy, switching from VIN to GND. Its size should be minimized and it should be isolated away from the rest of circuit for good EMI and low noise operation. Example PCB Layout |
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