Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

LTM8049 Datasheet(PDF) 16 Page - Linear Technology

Part # LTM8049
Description  15V, 4A Step-Up 關Module Regulator
PDF  20 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTM8049 Datasheet(HTML) 16 Page - Linear Technology

Back Button LTM8049 Datasheet HTML 12Page - Linear Technology LTM8049 Datasheet HTML 13Page - Linear Technology LTM8049 Datasheet HTML 14Page - Linear Technology LTM8049 Datasheet HTML 15Page - Linear Technology LTM8049 Datasheet HTML 16Page - Linear Technology LTM8049 Datasheet HTML 17Page - Linear Technology LTM8049 Datasheet HTML 18Page - Linear Technology LTM8049 Datasheet HTML 19Page - Linear Technology LTM8049 Datasheet HTML 20Page - Linear Technology  
Zoom Inzoom in Zoom Outzoom out
 16 / 20 page
background image
LTM4661
16
4661f
For more information www.linear.com/LTM4661
Figure  15 shows a measured thermal picture of the
LTM4661 running from 3.3V input to 12V output at 0.8A
DC current with 200LFM airflow and no heat sink.
Figure 15. Thermal Image, 3.3V Input to 12V Output at 0.8A,
200LFM Air Flow, No Heat Sink
Safety Considerations
The LTM4661 modules do not provide galvanic isolation
from VIN to VOUT. There is no internal fuse. If required,
a slow blow fuse with a rating twice the maximum input
current needs to be provided to protect each unit from
catastrophic failure. The device does support thermal
shutdown and overcurrent protection.
Layout Checklist/Example
The high integration of LTM4661 makes the PCB board
layoutverysimpleandeasy.However,tooptimizeitselectri-
cal and thermal performance, some layout considerations
are still necessary.
• Use large PCB copper areas for high current paths,
including VIN, GND and VOUT. It helps to minimize the
PCB conduction loss and thermal stress.
• Placehighfrequencyceramicinputandoutputcapaci-
tors next to the VIN, PGND and VOUT pins to minimize
high frequency noise.
• Place a dedicated power ground layer underneath the
unit.
• Tominimizetheviaconductionlossandreducemodule
thermal stress, use multiple vias for interconnection
between top layer and other power layers.
• Do not put vias directly on the pad, unless they are
capped or plated over.
• For parallel modules, tie the VOUT, VFB and COMP
pins together. Use an internal layer to closely connect
these pins together.
• Bring out test points on the signal pins for monitoring.
Figure 16givesagoodexampleoftherecommendedlayout.
APPLICATIONS INFORMATION
Figure 16. Recommended PCB Layout
VIN
GND
GND
VOUT
4661 F16



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com