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LT8602 Datasheet(PDF) 30 Page - Linear Technology

Part # LT8602
Description  42V, Low IQ, Quad Output Triple Monolithic Buck Converter and Boost Controller
PDF  38 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LT8602 Datasheet(HTML) 30 Page - Linear Technology

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LT8603
30
8603f
For more information www.linear.com/LT8603
APPLICATIONS INFORMATION
Buck: Burst Mode Operation
With the SYNC pin held low to select Burst Mode opera-
tion, the LT8603 will automatically transition to Burst
Mode at light load for best efficiency. In Burst Mode
operation, most of the circuits are shut down between
switch-on bursts to minimize power loss. If at least one
channel remains full frequency, the oscillator remains
on and all bursts are synchronized to the appropriate
phase of the oscillator. If all channels go into Burst Mode
operation, the oscillator will also shut off between bursts
with a further savings in power. Because the channels
of the LT8603 may have different loads, channels can
have different switching frequencies when in Burst Mode
operation.
GENERAL FUNCTIONS
General: Power Good Comparators
Each LT8603 channel has a power good comparator with
an open drain output pin, PGx. For the buck channels,
each PG pin is pulled low when the corresponding feed-
back voltage is either above or below its reference voltage
by more than 8%. The boost channel’s PG pin is pulled
low when its feedback voltage is below its reference volt-
age by more than 8%. See the Electrical Characteristics
table for more information on each channel’s power good
thresholds. Note, the PG outputs are not valid until INTVCC
rises above 2.7V.
General: Power-On Reset Timer
The LT8603 provides a programmable reset timer. The
POREN pin is the enable for the reset timer and includes a
1μA internal pull-up. Once enabled, the reset timer begins
an internal clock counter that terminates after 64 cycles.
Upon counter termination, the RST open-drain pull-down
releases allowing the pin to transition high. The RST out-
put includes a weak, 100k, internal pull-up resistor to
approximately 2V.
The power-on reset timeout period, tRST, can be pro-
grammed by connecting a capacitor, CPOR, between the
CPOR pin and ground. The value of tRST is calculated by:
tRST = 35.2 •CPOR
where CPOR is in pF and tRST is in microseconds. For exam-
ple, using a capacitor value of 8.2nF gives a 289ms reset
timeout period. The accuracy of tRST will be determined
Figure 10. Tracking Output Waveforms
TRKSS2
VOUT1
R1
R2
LT8603
COINCIDENT TRACKING VOUT1> VOUT2
R1=R2• VOUT2 –1
(
)
TIME
(10a) Coincident Tracking
VOUT1
VOUT2
TIME
8603 F10
(10b) Ratiometric Tracking
VOUT1
VOUT2



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