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LTC2636 Datasheet(PDF) 24 Page - Linear Technology |
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LTC2636 Datasheet(HTML) 24 Page - Linear Technology |
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24 / 28 page ![]() LTC2668 24 2668fa For more information www.linear.com/LTC2668 operation The amplifiers are stable driving capacitive loads of up to 1000pF. Thermal Overload Protection The LTC2668 protects itself if the die temperature exceeds 160°C. All channels power down, and the open-drain OVRTMP interrupt pin pulls low. The reference and bias circuits stay powered on. Once triggered, the device stays in shutdown even after the die cools. Thetemperatureofthediemustfalltoapproximately150°C before the channels can be returned to normal operation. Once the part has cooled sufficiently, the shutdown can be cleared with any valid update operation, including LDAC or a toggle operation. A CS/LD rising edge releases the OVRTMP pin regardless of the die temperature. Since the total load current of the device can easily exceed 100mA, die heating potential of the system design should be evaluated carefully. Grounded loads as low as 1k may be used and will not result in excessive heat. Thermal protection can be disabled by using the Config command to set the TS bit (see Figure 9). Board Layout The excellent load regulation and DC crosstalk perfor- mance of these devices is achieved in part by minimizing common-mode resistance of signal and power grounds. Aswithanyhighresolutionconverter,cleanboardground- ing is important. A low impedance analog ground plane is necessary, as are star-grounding techniques. Keep the board layer used for star ground continuous to minimize ground resistances; that is, use the star-ground concept without using separate star traces. Resistance from the REFLO pin to the star point should be as low as possible. For best performance, stitch the ground plane with arrays of vias on 150 to 200 mil centers connecting it with the ground pours from the other board layers. This reduces overallgroundresistanceandminimizesgroundlooparea. Using LTC2668 in 5V Single-Supply Systems LTC2668 can be used in single-supply systems simply by connecting the V– pins to ground along with REFLO and GND, while V+ and AVP are connected to a 5V supply. OVP can be connected to the 5V supply or to the logic supply voltage if lower than 5V. With the internal reference, use the 0V to 5V output range. As with any rail-to-rail device, the output is limited to voltages within the supply range. Since the outputs of the device cannot go below ground, they may limit at the lowest codes, as shown in Figure 10b. Simi- larly, limiting can occur near full-scale if full-scale error (FSE = VOS + GE) is positive, or if V+ < 2 • VREF. See Figure 10c. The multiplexer can be used and is fully functional. It can pull all the way to ground, but the upper headroom limita- tion means that it is useful for output voltages of 3.6V or below only (V+ = 5V). More flexibility can be afforded by using an external refer- ence. For example, by using a 1.25V reference such as the LTC6655, we can now select between 0x to 2x and 0x to 4x ranges, which give full-scale voltages of 2.5V and 5V, respectively. Furthermore, the part can be configured for reset to zero- or mid-scale codes (see the Output Ranges section). |
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