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LTC2636 Datasheet(PDF) 5 Page - Linear Technology |
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LTC2636 Datasheet(HTML) 5 Page - Linear Technology |
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5 / 28 page  LTC2668 5 2668fa For more information www.linear.com/LTC2668 electrical characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. AVP = 5V, OVP = 5V, V+ = 15V, V– = –15V, VREF = 2.5V, VOUT unloaded unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS REFCOMP Pin Short-Circuit Current AVP = 5.5V, Forcing Output to GND l 200 µA Reference Load Regulation AVP = 5V ± 10%, IOUT = 100µA Sourcing 140 mV/mA Reference Output Voltage Noise Density CREFCOMP = CREF = 0.1µF, at f = 10kHz 32 nV/√Hz Reference Input Range External Reference Mode (Note 8) l 0.5 AVP – 1.75 V Reference Input Current External Reference l 0.001 1 µA Reference Input Capacitance (Note 9) l 40 pF Power Supply AVP Analog Supply Voltage l 4.5 5.5 V V+ Analog Positive Supply l 4.5 15.75 V V– Analog Negative Supply V– Not Tied to GND V– Tied to GND l –15.75 0 –4.5 V V OVP Digital I/O Supply Voltage l 1.71 AVP + 0.3 V IAVP Supply Current AVP AVP = 5V, Unipolar Ranges (Note 10) AVP = 5V, Bipolar Ranges (Note 10) l l 5.4 9.4 6.5 12 mA mA IS Supply Current V+/V– Unipolar Ranges (Code = 0) Bipolar Ranges (Note 11) l l 4.6 8 6.5 9.5 mA mA IOVP Supply Current OVP (Note 12) OVP = 5V l 0.02 1 µA AVP Shutdown Supply Current OVP = AVP = 5V, V+/V– = ±15V l 1 3 µA V+ Shutdown Supply Current OVP = AVP = 5V, V+/V– = ±15V l 35 70 µA V– Shutdown Supply Current OVP = AVP = 5V, V+/V– = ±15V l –60 –27 µA Monitor Mux Monitor Mux DC Output Impedance 2.2 kΩ Monitor Mux Leakage Current Monitor Mux Disabled (High Impedance) l 0.02 1 µA Monitor Mux Output Voltage Range Monitor Mux Selected to DAC Channel l V– V+ – 1.4 V Monitor Mux Continuous Current (Note 9) l ±1 mA AC Performance tSET Settling Time (Notes 9, 13) 0V to 5V or ±2.5V Span, ±5V Step ±0.024% (±1LSB at 12 Bits) ±0.0015% (±1LSB at 16 Bits) 4.5 9 µs µs Settling Time (Notes 9, 13) 0V to 10V or ±5V Span, ±10V Step ±0.024% (±1LSB at 12 Bits) ±0.0015% (±1LSB at 16 Bits) 8 9 µs µs Settling Time (Notes 9, 13) ±10V Span, ±20V Step ±0.024% (±1LSB at 12 Bits) ±0.0015% (±1LSB at 16 Bits) 15.5 20.5 µs µs SR Voltage Output Slew Rate 5 V/µs Capacitive Load Driving 1000 pF Glitch Impulse (Note 14) At Mid-Scale Transition, 0V to 5V Range 8 nV • s DAC-to-DAC Crosstalk (Note 15) Due to Full-Scale Output Change 6 nV • s en Output Voltage Noise 0V to 5V Output Span, Internal Reference Density at f = 1kHz Density at f = 10kHz 0.1Hz to 10Hz, Internal Reference 0.1Hz to 200kHz, Internal Reference 90 80 1.7 55 nV/√Hz nV/√Hz µVRMS µVRMS |
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