HIP6004E

FN4997 Rev 3.00

Page 10 of 14

November 10, 2015

response time to the removal of load. With a +5V input source,

the worst-case response time can be either at the application

or removal of load and dependent upon the DACOUT setting.

Be sure to check both of these equations at the minimum and

maximum output levels for the worst case response time. With

a +12V input, and output voltage level equal to DACOUT,

Input Capacitor Selection

Use a mix of input bypass capacitors to control the voltage

overshoot across the MOSFETs. Use small ceramic capacitors

for high-frequency decoupling and bulk capacitors to supply the

capacitors physically close to the MOSFETs and between the

The important parameters for the bulk input capacitor are the

voltage rating and the RMS current rating. For reliable

operation, select the bulk capacitor with voltage and current

ratings above the maximum input voltage and largest RMS

current required by the circuit. The capacitor voltage rating

should be at least 1.25 times greater than the maximum input

voltage and a voltage rating of 1.5 times is a conservative

guideline. The RMS current rating requirement for the input

capacitor of a buck regulator is approximately 1/2 the DC load

current.

For a through-hole design, several electrolytic capacitors may be

needed. For surface mount designs, solid tantalum capacitors can

be used, but caution must be exercised with regard to the

capacitor surge current rating. These capacitors must be capable

of handling the surge current at power-up. Some capacitor series

available from reputable manufacturers are surge current tested.

MOSFET Selection/Considerations

The HIP6004E requires 2 N-Channel power MOSFETs. These

requirements, and thermal management requirements.

In high-current applications, the MOSFET power dissipation,

package selection and heatsink are the dominant design factors.

The power dissipation includes two loss components; conduction

loss and switching loss. The conduction losses are the largest

component of power dissipation for both the upper and the lower

MOSFETs. These losses are distributed between the two

MOSFETs according to duty factor (see the equations below).

Only the upper MOSFET has switching losses, since the Schottky

rectifier clamps the switching node before the synchronous

rectifier turns on. These equations assume linear voltage current

transitions and do not adequately model power loss due the

reverse recovery of the lower MOSFET’s body diode. The gate-

charge losses are dissipated by the HIP6004E and don't heat the

MOSFETs. However, large gate charge increases the switching

losses. Ensure that both MOSFETs are within their maximum

junction temperature at high ambient temperature by calculating

the temperature rise according to package thermal-resistance

specifications. A separate heatsink may be necessary depending

upon MOSFET power, package type, ambient temperature and

air flow.

Standard-gate MOSFETs are normally recommended for use

with the HIP6004E. However, logic-level gate MOSFETs can

be used under special circumstances. The input voltage, upper

gate drive level, and the MOSFET’s absolute gate-to-source

voltage rating determine whether logic-level MOSFETs are

appropriate.

Figure 9 shows the upper gate drive (BOOT pin) supplied by a

a floating supply voltage referenced to the PHASE pin. This

level MOSFETs can only be used if the MOSFET’s absolute

gate-to-source voltage rating exceeds the maximum voltage

applied to VCC.

Figure 10 shows the upper gate drive supplied by a direct

1

2

+12V

PGND

HIP6004E

GND

LGATE

UGATE

PHASE

BOOT

VCC

+5V OR +12V

NOTE:

NOTE:

Q1

Q2

+

-

FIGURE 9. UPPER GATE DRIVE - BOOTSTRAP OPTION

D2