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X9268 Datasheet(PDF) 17 Page - Renesas Technology Corp |
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X9268 Datasheet(HTML) 17 Page - Renesas Technology Corp |
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17 / 22 page ![]() X9268 FN8172 Rev.4.00 Page 17 of 22 August 29, 2006 EQUIVALENT A.C. LOAD CIRCUIT AC TIMING HIGH-VOLTAGE WRITE CYCLE TIMING XDCP TIMING Symbol Parameter Min. Max. Units fSCL Clock Frequency 400 kHz tCYC Clock Cycle Time 2500 ns tHIGH Clock High Time 600 ns tLOW Clock Low Time 1300 ns tSU:STA Start Setup Time 600 ns tHD:STA Start Hold Time 600 ns tSU:STO Stop Setup Time 600 ns tSU:DAT SDA Data Input Setup Time 100 ns tHD:DAT SDA Data Input Hold Time 30 ns tR SCL and SDA Rise Time 300 ns tF SCL and SDA Fall Time 300 ns tAA SCL Low to SDA Data Output Valid Time 0.9 s tDH SDA Data Output Hold Time 0 ns TI Noise Suppression Time Constant at SCL and SDA inputs 50 ns tBUF Bus Free Time (Prior to Any Transmission) 1200 ns tSU:WPA A0, A1 Setup Time 0 ns tHD:WPA A0, A1 Hold Time 0 ns Symbol Parameter Typ. Max. Units tWR High-voltage write cycle time (store instructions) 5 10 ms Symbol Parameter Min. Max. Units tWRPO Wiper response time after the third (last) power supply is stable 5 10 s tWRL Wiper response time after instruction issued (all load instructions) 5 10 s 5V 1533 100pF SDA pin RH 10pF CL CL RW RTOTAL CW 25pF 10pF RL SPICE Macromodel 3V 867 100pF SDA pin |
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