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IMX8MDQLQCEC Datasheet(PDF) 29 Page - NXP Semiconductors |
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IMX8MDQLQCEC Datasheet(HTML) 29 Page - NXP Semiconductors |
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29 / 97 page ![]() Electrical characteristics i.MX 8M Dual / 8M QuadLite / 8M Quad Applications Processors Data Sheet for Consumer Products, Rev. 0.1, 05/2018 NXP Semiconductors 29 3.5.1 General purpose I/O (GPIO) DC parameters Table 26 shows DC parameters for GPIO pads. The parameters in Table 26 are guaranteed per the operating ranges in Table 7, unless otherwise noted. 3.5.2 DDR I/O DC electrical characteristics The DDR I/O pads support LPDDR 4, DDR4, and DDR3L operational modes. The DDR Memory Controller (DDRMC) is designed to be compatible with JEDEC-compliant SDRAMs. Table 26. GPIO DC parameters Parameter Symbol Test Conditions Min Typ Max Unit High-level output voltage VOH (1.8 V) Min VDD, IOH = –100 μA, IOH = –2 mA VDD - 0.2, VDD - 0.45 —— V VOH (3.3 V) VDD - 0.2 2.4 —— V Low-level output voltage VOL (1.8 V) Min VDD, IOH = 100 μA, IOH = 3 mA — — 0.2 0.2 x VDD V VOL (3.3 V) — — 0.2 0.4 V High-level input voltage VIH (1.8 V) ipp_lvttl_en = 0 0.7 x VDD —VDD V VIH (3.3 V) ipp_lvttl_en = 1 2 — VDD V VIH_1VCOMS (3.3 V) ipp_lvttl_en = 0 0.7 x VDD —VDD V Low-level input voltage VIL (1.8 V) ipp_lvttl_en = 0 0 — 0.2 x VDD V VIL_emmc (1.8 V) ipp_lvttl_en = 0 0 — 0.35 x VDD V VIL (3.3 V) ipp_lvttl_en = 1 0 — 0.8 V VIL_emmc (3.3 V) ipp_lvttl_en = 0 0 — 0.25 x VDD V VIL_1vcmos (3.3 V) ipp_lvttl_en = 0 0 — 0.2 x VDD V Input hysteresis VHYS (1.8 V) ipp_hys = 1 — 0.15 — V VHYS (3.3 V) ipp_hys = 1 — 0.2 — V Pull-up resistor — — 30 x 0.75 30 30 x 1.25 K Ω Pull-down resistor — — 95 x 0.75 95 95 x 1.25 K Ω High level input current1 1 The leakage limit for the following pins: HDMI_TX (several) is ±200 μA; HDMI_AUX_N/P is ±65 μA; PMIC_ON_REQ is ±60 μA; PMIC_STBY_REQ is ±80 μA; RTC_RESET_B is ±60 μA; ONOFF is ±60 μA; POR_B is ±60 μA; and SD2_CD_B is ±60 μA. IIH — -50 — 50 μA Low level input current1 IIL — -50 — 50 μA |
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