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IMX8MDQLQCEC Datasheet(PDF) 72 Page - NXP Semiconductors |
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IMX8MDQLQCEC Datasheet(HTML) 72 Page - NXP Semiconductors |
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72 / 97 page ![]() i.MX 8M Dual / 8M QuadLite / 8M Quad Applications Processors Data Sheet for Consumer Products, Rev. 0.1, 05/2018 72 NXP Semiconductors Boot mode configuration 4.2 Boot device interface allocation Table 81 lists the interfaces that can be used by the boot process in accordance with the specific Boot mode configuration. The table also describes the interface’s specific modes and IOMUXC allocation, which are configured during boot when appropriate. Table 81. Interface allocation during boot Interface IP Instance Allocated Pads During Boot Comment NAND Flash GPMI NAND_ALE, NAND_CE0_B, NAND_CLE, NAND_DATA00, NAND_DATA01, NAND_DATA02, NAND_DATA03, NAND_DATA04, NAND_DATA05, NAND_DATA06, NAND_DATA07, NAND_DQS, NAND_RE_B, NAND_READY_B, NAND_WE_B, NAND_WP_B 8-bit, only CS0 is supported. SD/MMC USDHC-1 GPIO1_IO03, GPIO1_IO06, GPIO1_IO07, SD1_RESET_B, SD1_CLK, SD1_CMD, SD1_STROBE, SD1_DATA0, SD1_DATA1, SD1_DATA2, SD1_DATA3, SD1_DATA4, SD1_DATA5, SD1_DATA6, SD1_DATA7 1, 4, or 8-bit SD/MMC USDHC-2 GPIO1_IO04, GPIO1_IO08, GPIO1_IO07, SD2_RESET_B, SD2_CD_B, SD2_WP, SD2_CLK, SD2_CMD, SD2_DATA0, SD2_DATA1, SD2_DATA2, SD2_DATA3 1 or 4-bit USB USB_OTG PHY — — |
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