X76F641 datasheet(7/17 Pages) XICOR

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X76F641

Figure 5. Acknowledge Polling

8th clk.

of 8th

pwd. byte

‘ACK’

clk

8th

clk

‘ACK’

clk

‘ACK’

START

condition

8th bit

ACK or

no ACK

SCL

SDA

7025 FM 10

READ OPERATIONS

Read operations are initiated in the same manner as write

operations but with a different command code.

Random Read

The master issues the start condition and a Read instruc-

tion and password, performs a Password Ack Polling, then

issues the word address. Once the password has been

acknowledged and ﬁrst byte has been read, another start

can be issued followed by a new 8-bit address. Random

reads are allowed, but only the low order 8 bits can

change. This limits random reads to a 256 byte block.

Therefore, with a single password cycle only a 256 byte

block of array 0 may be accessed randomly. To randomly

access another block of array 0, a stop must be issued fol-

lowed by a new command/address/password sequence.

A random read of the array 1 can access all locations with-

out another password command sequence.

Sequential Read

The host can read sequentially within an array after the

password acceptance sequence. The data output is

sequential, with the data from address n followed by the

data from n+1. The address counter for read operations

increments all address bits, allowing the entire memory

array contents to be serially read during one operation. At

the end of the address space (address 1FFFh for array 0,

1Fh for array 1), the counter “rolls over” to address 0 and

the X76F641 continues to output data for each acknowl-

edge received. Refer to ﬁgure 7 for the address, acknowl-

edge and data transfer sequence. An acknowledge must

follow each 8-bit data transfer. After the last bit has been

read, a stop condition is generated without a preceding

acknowledge.

Figure 6. Random Read

Data Y

COMMAND

Read

Password

Read

Password

SDA

Data X

Wait tWC

ACK POLLING

ACK Polling

Repeated

COMMAND

Command

If ACK, then

Password Matches

7025 FM 11

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