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SSM4567ACBZ-R7 Datasheet(PDF) 35 Page - Analog Devices |
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SSM4567ACBZ-R7 Datasheet(HTML) 35 Page - Analog Devices |
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35 / 52 page ![]() Data Sheet SSM4567 Rev. 0| Page 35 of 52 DAC CONTROL REGISTER Address: 0x02, Reset: 0x32, Name: DAC_CTRL Table 28. Bit Descriptions for DAC_CTRL Bits Bit Name Settings Description Reset Access 7 DAC_HV DAC Hard Volume 0x0 R/W 0 Soft Volume Ramping 1 Hard/Immediate Volume Change 6 DAC_MUTE DAC Mute Control 0x0 R/W 0 DAC Unmuted 1 DAC Muted 5 DAC_HPF DAC High-Pass Filter Enable 0x1 R/W 0 DAC High-Pass Filter Off 1 DAC High-Pass Filter On 4 DAC_LPM DAC Low Power Mode Enable 0x1 R/W 0 DAC Low Power Mode Off (128 × fs in PDM Mode) 1 DAC Low Power Mode On (64 × fs in PDM Mode) 3 RESERVED Reserved. 0x0 R/W [2:0] DAC_FS DAC Sample Rate Selection 0x2 R/W 000 8 kHz to 12 kHz Sample Rate 001 16 kHz to 24 kHz Sample Rate 010 32 kHz to 48 kHz Sample Rate 011 64 kHz to 96 kHz Sample Rate 100 128 kHz to 192 kHz Sample Rate 101 Reserved 110 Reserved 111 Reserved |
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