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TLV9064IPWR Datasheet(PDF) 8 Page - Texas Instruments

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Part # TLV9064IPWR
Description  10-MHz, RRIO, CMOS Operational Amplifiers for Cost-Sensitive Systems
PDF  62 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TLV9064IPWR Datasheet(HTML) 8 Page - Texas Instruments

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1
2
3
4
5
10
9
8
7
6
V+
OUT B
–IN B
+IN B
SHDN B
OUT A
–IN A
+IN A
V–
SHDN A
A
B
OUT A
-IN A
+IN A
V-
1
2
3
4
V+
OUT B
-IN B
+IN B
8
7
6
5
Exposed
Thermal
Die Pad
on
Underside
(1)
1
2
3
4
8
7
6
5
V+
OUTB
-
INB
+INB
OUTA
-
INA
+INA
V
-
8
TLV9061, TLV9062S, TLV9062, TLV9064, TLV9064S
SBOS839E – MARCH 2017 – REVISED JULY 2018
www.ti.com
Product Folder Links: TLV9061 TLV9062S TLV9062 TLV9064 TLV9064S
Submit Documentation Feedback
Copyright © 2017–2018, Texas Instruments Incorporated
TLV9062 D, DGK, PW Packages
8-Pin SOIC, VSSOP, TSSOP
Top View
TLV9062 DSG Package
8-Pin WSON With Exposed Thermal Pad
Top View
Pin Functions: TLV9062
PIN
I/O
DESCRIPTION
NAME
NO.
–IN A
2
I
Inverting input, channel A
+IN A
3
I
Noninverting input, channel A
–IN B
6
I
Inverting input, channel B
+IN B
5
I
Noninverting input, channel B
OUT A
1
O
Output, channel A
OUT B
7
O
Output, channel B
NC
—
—
No internal connection
SHDN A
—
I
Shutdown (logic low), enable (logic high), channel A
SHDN B
—
I
Shutdown (logic low), enable (logic high), channel B
V–
4
—
Negative (lowest) supply or ground (for single-supply operation)
V+
8
—
Positive (highest) supply
TLV9062S DGS Package
10-Pin VSSOP
Top View
Pin Functions: TLV9062S
PIN
I/O
DESCRIPTION
NAME
NO.
–IN A
2
I
Inverting input, channel A
+IN A
3
I
Noninverting input, channel A
–IN B
8
I
Inverting input, channel B
+IN B
7
I
Noninverting input, channel B
OUT A
1
O
Output, channel A
OUT B
9
O
Output, channel B
NC
—
—
No internal connection
SHDN A
5
I
Shutdown (logic low), enable (logic high), channel A
SHDN B
6
I
Shutdown (logic low), enable (logic high), channel B
V–
4
—
Negative (lowest) supply or ground (for single-supply operation)



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