FUSB307BVMPX datasheet(48/57 Pages) ONSEMI

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Table 56. RXHEADH

Received Header High byte is stored here. Expected GoodCRC messages are not stored.

Address: 33h

Reset Value: 0x00

Type: Read

Bit #

Name

R/W/C

Size (Bits)

Receive Header High Description

7:0

RXHEADH

Rx Header Data High

Table 57. RXDATA

Address: 34h−4Fh

Reset Value: 0x00

Type: Read

Byte #

Name

R/W/C

Size (Bits)

Receive Payload Description

27:0

RXDATA0..27

Rx Payload

Table 58. TRANSMIT

Writing this register will start a PD transmission. If Cable Reset, Hard Reset or BIST Carrier Mode 2 is written, RETRY_CNT is ignored

and signaling is not retried.

Address: 50h

Reset Value: 0x00

Type: Read/Write

Bit #

Name

R/W/C

Size (Bits)

Transmit Description

7:6

Reserved

Reserved: 00b

5:4

RETRY_CNT

R/W

Retry Counter

00b: No message retry is required

01b: Automatically retry message transmission once

10b: Automatically retry message transmission twice

11b: Automatically retry message transmission three times

Reserved

Reserved: 0b

2:0

TXSOP

R/W

Transmit SOP Message

000b: Transmit SOP

001b: Transmit SOP’

010b: Transmit SOP’’

011b: Transmit SOP_DBG’

100b: Transmit SOP_DBG”

101b: Transmit Hard Reset

110b: Transmit Cable Reset

111b: Transmit BIST Carrier Mode 2

(Enabled for tBISTContMode)

Table 59. TXBYTECNT

Address: 51h

Reset Value: 0x00

Type: Read/Write

Bit #

Name

R/W/C

Size (Bits)

Transmit Byte Count Description

7:0

TXBYTECNT

R/W

Number of bytes to be transmitted

Table 60. TXHEADL

Address: 52h

Reset Value: 0x00

Type: Read/Write

Bit #

Name

R/W/C

Size (Bits)

Transmit Header Low Description

7:0

TXHEADL

R/W

Transmit Header Low

FUSB307BVMPX Datasheet(PDF) 48 Page - ON Semiconductor

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