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ML7021 Datasheet(PDF) 10 Page - OKI electronic componets |
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ML7021 Datasheet(HTML) 10 Page - OKI electronic componets |
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10 / 24 page  1Semiconductor ML7021 10 AC Characteristics Parameter Clock Frequency When Internal Sync Signal is not used Clock Cycle Time When Internal Sync Signal is not used Clock Duty Ratio Clock High Level Pulse Width fc = 19.2 MHz Clock Low Level Pulse Width fc = 19.2 MHz Clock Rise Time Clock Fall Time Sync Clock Output Time Internal Sync Clock Frequency Internal Sync Clock Output Cycle Time Internal Sync Clock Duty Ratio Internal Sync Signal Output Delay Time Internal Sync Signal Period Internal Sync Signal Output Width Transmit/receive Operation Clock Frequency Transmit/receive Sync Clock Cycle Time Transmit/receive Sync Clock Duty Ratio Transmit/receive Sync Signal Period Sync Timing Sync Signal Width Receive Signal Setup Time Receive Data Input Time IRLD Signal Output Delay Time Serial Output Delay Time Symbol fC tMCK tDMC tMCH tMCL tr tf tDCM fCO tCO tDCO tDCC tCYO tWSO fSCK tSCK tDSC tCYC tXS tSX tWSY tDS tID tDIC tWIR tSD tXD tWR Min. — 17.5 — 50 40 20.8 20.8 — — — — — 64 0.488 40 123 45 tSCK — — 1 Typ. 19.2 — 52.08 — — — — 256 3.9 50 125 tCO — — 50 125 — — 7tSCK tSCK — Max. — 20 — 57.14 60 31.3 31.3 — — — — — 2048 15.6 60 — — — — Min. — 17.5 — 50 40 20.8 20.8 — — — — — — — — — 64 0.488 40 123 45 45 tSCK 45 — — — — — 1 Typ. 19.2 — 52.08 — — — — — — — 256 3.9 50 — 125 tCO — — 50 125 — — — — 7tSCK — tSCK — — — Max. — 20 — 57.14 60 31.3 31.3 5 5 30 — — — 5 — — 2048 15.6 60 — — — — 138 — 90 90 — Unit MHz ns ns ns ns ns ns ns kHz ms % ns ms ms kHz ms % ms ns ns ms ns ms ns ms ns ns ms VDD = 2.7 V to 3.6 V VDD = 4.5 V to 5.5 V (Ta = –40˚C to +85˚C) Reset Start Time tDRS 5— — ns Reset End Time tDRE ——52 ns Processing Operation Start Time tDIT 100 — — 100 — — ms IRLD Signal Output Width Reset Signal Input Width ——30 —— 5 —— 5 —— 5 45—— 45—— — — 138 — 5 — — 90 — — — — — 90 52 Receive Signal Hold Time tDH 45—— ns 45—— tCYC-tSCK tCYC-tSCK |
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