9

44411f

LTC4441/LTC4441-1

BLANK

SGND

RBLANK

POWER

MOSFET

LOAD

INDUCTOR

TO

SWITCHING

CONTROLLER’S

CURRENT

SENSE

INPUT

OUT

LTC4441

R4

R3

4441 F03

KEEP THIS

TRACE SHORT

MB

DRIVER

LEADING

EDGE DELAY

R7

PGND

inductor or resistor). The slew rate of the drain voltage

causes current to flow to the MOSFET’s gate through its

gate-to-drain capacitance. If the MOSFET driver does not

have sufficient sink current capability (low output imped-

momentarily pull the gate high and turn the MOSFET

back on.

is off and the driver output, OUT, may momentarily pull

power MOSFET. The N-channel MOSFETs N2 and N3,

shown in Figure 2, prevent the driver output from going

hold the N2 gate low, thus disabling N2.

The predriver that drives Q1, P1 and N1 uses an adaptive

method to minimize cross-conduction currents. This is

done with a 5ns nonoverlapping transition time. N1 is fully

turned off before Q1 is turned on and vice-versa using this

5ns buffer time. This minimizes any cross-conduction

currents while Q1 and N1 are switching on and off without

affecting their rise and fall times.

Thermal Shutdown

The LTC4441/LTC4441-1 has a thermal detector that

low when activated. If the junction temperature exceeds

150°C, the driver pull-up devices, Q1 and P1, turn off while

the pull-down device, N1, turns on briskly for 200ns to

quickly pull the output low. The thermal shutdown circuit

has 20°C of hysteresis.

Enable/Shutdown Input

The EN/SHDN pin serves two functions. Pulling this pin

below 0.45V forces the LTC4441/LTC4441-1 into shut-

down mode. In shutdown mode, the internal circuitry and

to <12µA. If the input voltage is between 0.45V and 1.21V,

driver output stays low. If the input goes above 1.21V, the

driver starts switching according to the input logic signal.

The driver enable comparator has a small hysteresis of

120mV.

Blanking

In some switcher applications, a current sense resistor is

placed between the low side power MOSFET’s source

terminal and ground to sense the current in the MOSFET.

With this configuration, the switching controller must

incorporate some timing interval to blank the ringing on

the current sense signal immediately after the MOSFET is

turned on. This ringing is caused by the parasitic induc-

tance and capacitance of the PCB trace and the MOSFET.

The duration of the ringing is thus dependent on the PCB

layout and the components used and can be longer than

the blanking interval provided by the controller.

The 10-Lead LTC4441 includes an open-drain output that

can be used to extend this blanking interval. The 8-Lead

LTC4441-1 does not have this blanking function. Figure 3

shows the BLANK pin connection. The BLANK pin is

input. Figure 4 shows the blanking waveforms. If the

driver input is low, the external power MOSFET is off and

high, the power MOSFET turns on after the driver’s propa-

gation delay. MB remains on, attenuating the ringing seen

blanking time, MB turns off to enable the current sense

APPLICATIO S I FOR ATIO

Figure 3. Blanking Circuit