N32905KDN datasheet(6/70 Pages) NUVOTON

6 / 70 page

N3290X DATASHEET

Nuvoton Technology Corp.

Release Date: Oct., 2018

http://www.nuvoton.com/

Rev. A6.2

FEATURES



CPU



ARM926EJ-S 32-bit RISC CPU with 8KB I-Cache & 8KB D-Cache



Frequency up to 200MHz@1.8V core power operation voltage



JTAG interface supported for development and debugging



Internal SRAM & ROM



8KB internal SRAM and 16KB IBR internal booting ROM supported



IBR booting messages displayed by UART console for debugging supported



Different system booting modes supported:



Memory card



SD card



SD-to-NAND flash bridge



Raw NAND Flash



SPI Flash



USB



EDMA (Enhanced DMA)



Totally 5 DMA channels supported



4 peripheral DMA channels for transfer between memory and on-chip

peripherals, such as ADC, UART and SPI



One dedicated channel for memory-to-memory transfer



Byte, half-word and word data width types supported



Single and burst transfer modes supported



Block transfer supported in memory-to-memory transfer channel



Color format transformation supported in memory-to-memory transfer

channel



Source color format could be RGB555, RGB565 and YCbCr422



Destination color format could be RGB555, RGB565 and YCbCr422



Auto reload supported for continuous data transfer



Interrupt generation supported in the half-of-transfer or end-of-transfer



Capture (CMOS Sensor I/F)



CCIR601 & CCIR656 interfaces supported for connection to CMOS image

sensor



Resolution up to 2M pixel for Still Image Capture, 640x480 (VGA) resolution

for MJPEG Video Streaming



YUV422 and RGB565 color format supported for data-in from CMOS sensor



YUV422, RGB565, RGB555 and Y-only color format supported for data

storing to system memory



Planar and packet data formats supported for data storing to system

memory



Image cropping supported with the cropping window up to 4096x2048



Image scaling-down supported



Vertical and horizontal scaling-down for preview mode supported



The scaling factor is N/M



Two pairs of configurable 8-bit N and 8-bit M for vertical and

horizontal scaling-down



The value of N has to equal to or less than M



Frame rate control supported



Combines two interlace fields to a single frame supported for data in from

TV-decoder

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