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N32905KDN Datasheet(PDF) 25 Page - Nuvoton Technology Corporation |
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N32905KDN Datasheet(HTML) 25 Page - Nuvoton Technology Corporation |
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25 / 70 page  N3290X DATASHEET Nuvoton Technology Corp. 25 Release Date: Oct., 2018 http://www.nuvoton.com/ Rev. A6.2 Pin No Name Type Group Description KPI_SO[1] OU KPI KPI Scan Out Bit 1 77 GPA[2] IOU GPIOA GPIO Port A Bit 2 LMVSYNC OU LCD MPU LCD Interface VSYNC, Output LFMARK IU LCD MPU LCD Interface Frame Mark, Input KPI_SO[0] OU KPI KPI Scan Out Bit 0 78 GPA[1] IOU GPIOA GPIO Port A Bit 1 SD_CD_ IU SD SD Card Detect, Input, Low Active 79 GPA[0] IOU GPIOA GPIO Port A Bit 0 80 RST_ IU SYSTEM System Reset, Input, Low Active WDT_RST_ OU SYSTEM Watch-Dog Reset, Output, Low Active 81 TCK ID JTAG JTAG Interface Test Clock, Input GPD[0] IOD GPIOD GPIO Port D Bit 0 SPI1_CS1_ OD SPI1 SPI Port 1 Device Select 1, Output, Low Active PWM0 OD PWM PWM Channel 0 82 TMS IU JTAG JTAG Interface Test Mode Select, Input GPD[1] IOU GPIOD GPIO Port D Bit 1 HUR_TXD OU UART High-Speed UART TX Data, Output PWM1 OU PWM PWM Channel 1 83 TDI IU JTAG JTAG Interface Test Data In, Input GPD[2] IOU GPIOD GPIO Port D Bit 2 HUR_RXD IU UART High-Speed UART RX Data, Input PWM2 OU PWM PWM Channel 2 84 TDO OU JTAG JTAG Interface Test Data Out, Output GPD[3] IOU GPIOD GPIO Port D Bit 3 HUR_CTS IU UART High-Speed UART Clear-To-Send, Input, Low Active PWM3 OU PWM PWM Channel 3 85 TRST_ IU JTAG JTAG Interface Test Reset, Input, Low Active GPD[4] IOU GPIOD GPIO Port D Bit 4 HUR_RTS OU UART High-Speed UART Reset-To-Send, Output, Low Active SPI0_CS1_ OU SPI0 SPI Port 0 Device Select 1, Output, Low Active 86 UD_CDET I USB USB Device Connect Detect, Input, High Active 87 VDD18 P Core Core Logic Power (1.8V) 88 MVSS G MVDD SDRAM I/F Ground (0V) 89 MVREF P MVDD 1/2 MVDD (0.9V) for DDR_VREF, when N32903U5DN and |
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