IRMCF188

9

www.irf.com

© 2014 International Rectifier

March 10, 2017

4

Application connection and Pin function

Figure 4 shows the application connections in leg shunt mode. Figure 5 shows the application connections in

single shunt mode.

P1.2/ TXD

P1.1/ RXD

XTAL0

PWMUH

PWMUL

PWMVH

PWMVL

PWMWH

PWMWL

GATEKILL

AIN2

– AIN4

Host

Microcontroller

(RS232C)

Digital I/O

Control

System

Clock

4 MHz

Crystal

P2.6/ AOPWM0

Analog Output

XTAL1

P3.0/ INT2

RESET

TDI

JTAG Control

( OTP programming

& Emulation)

T CLK

TSM

TDO

0.6V

OP2+

OP2-

-

OP2O

Other analog input (0

– 1,2V)

AVDD

1.8V

AVSS

VDD1

3.3V

VSS

CMEXT

OP3+

OP3- -

OP3O

OP1+

OP1-

-

OP1O

Optional External Voltage

Reference (0.6V)

P2.7/ AOPWM1

SCL

SDA

Other Communication

(I

Frequency

Synthesizer

RS232C

I

PORT1

PORT2

RESET

PWM0

PWM1

JTAG

Interface

Low Loss

Space

Vector

PWM

S/H

8051

CPU

Dual

Port

Memory

(2kB)

&

MCE

Memory

(12kB)

Motion

Control

Modules

Motion

Control

Sequencer

12-bit

A/D &

MUX

System

clock

Local

RAM

(2 kByte)

Program

Flash

(64 kByte)

System

Reset

Watchdog

Timer

Timers

IRMCF188

AREF

PWM2

P3.1/ AOPWM2

PORT3

P1.5

P1.6

P1.7

P2.2

P2.0/ NMI

P2.3

P3.2/ INT0

3

1.8V

Voltage

Regulator

VDDCAP

3.3V

Motor shunt

resistors

P3.3

P3.4

P3.5

P2.1

Motor

HVIC

Gate Drive

IRS2336D

0.6V

Motor

Current

Reconstruct

0.2V

From PFC

shunt

AC 230V

PFCPWM

PFC GATEKILL

PFC shunt

resistor

P1.3/SYNC

P1.0/T2

P1.4/CAP

S/H

ADCH, ADCL

2

A/D Calibration Reference

Voltages

From AC

Voltage

VDCBUS

VAC+

VAC-

VACO

0.2V

AIN1

Figure 4. IRMCF188 Leg Shunt Connection Diagram