PCF88132DA datasheet(17/72 Pages) PHILIPS

17 / 72 page

2004 Mar 05

Philips Semiconductors

Product speciﬁcation

(67 + 1)

× 102 pixels matrix LCD driver

PCF8813

PARALLEL INTERFACES

The parallel interface is an 8-bit bidirectional interface for

communication between the microcontroller and the LCD

driver chip. Two different parallel interfaces can be

selected by the inputs PS2, PS1 and PS0.

8.1

6800-type parallel interface

The interface functions of the 6800-type parallel interface

are shown in Table 2.

Table 2

6800-type parallel interface function

The 6800-type parallel interface can be configured to have

the clock connected to the Enable input (E) with timing as

shown in Fig.38, or with the clock connected to the chip

select input (SCE) and the Enable (E) is tied HIGH with

timing as shown in Fig.39. The PCF8813 is capable of

detecting these different modes automatically.

8.2

8080-type parallel interface

Table 3 shows the interface functions of the 8080-type

parallel interface.

Table 3

6800-type parallel interface function

SERIAL INTERFACES

Communication with the microcontroller can also be via a

clock-synchronized serial peripheral interface. It is

possible to select two different 3-line interfaces (SPI and

serial interface) or a 4-line serial interface (SPI). Selection

of the interface is made with the inputs PS2, PS1 and PS0

(see Section 7.1).

9.1

Serial peripheral interface

The Serial Peripheral Interface (SPI) is a 3-line or 4-line

interface for communication between the microcontroller

and the LCD driver. The 3-line interface requires a chip

enable input (SCE), serial clock (SCLK) and serial

data (SDATA). For the 4-line serial interface, a separate

D/C line is added. The PCF8813 is connected to the serial

data I/O (SDATA) of the microcontroller via the pads data

input (SDATA) and data output (SDOUT) connected

together.

9.1.1

WRITE MODE

The display data/command indication may be controlled

via software or by the D/C select input. When the D/C input

is used, display data is transmitted when D/C is HIGH, and

command data is transmitted when D/C is LOW (see

Figs 15 and 16). When D/C is not used, the display data

length instruction is used to indicate that a specific number

of display data bytes (1 to 256) are to be transmitted (see

Fig.17). The byte that follows the display data string is

handled as an instruction command.

If SCE is pulled HIGH during a serial display data stream,

the interrupted byte is invalid data but all previously

transmitted data is valid. The next byte received will be

handled as an instruction command (see Fig.18).

D/CR/WR

OPERATION

command data write

read status register

display data write

none

D/C

OPERATION

command data write

read status register

display data write

none

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