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SC4525FEVB Datasheet(PDF) 16 Page - Semtech Corporation |
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SC4525FEVB Datasheet(HTML) 16 Page - Semtech Corporation |
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16 / 23 page ![]() SC4525F 6 Applications Information (Cont.) Place the compensator zero, F Z, between 0% and 20% of the crossover frequency, F C. Use the compensator pole, F P, to cancel the ESR zero, F Z. Then, the parameters of the compensation network can be calculated by the following equations. m 7 g 10 R 20 C A = 7 Z1 5 R F π 2 1 C = 7 P1 8 R F π 2 1 C = where gm=0.3mA/V is the EA gain of the SC4525F. Example: Determine the voltage compensator for an 350kHz, 2V to 3.3V/3A converter with 47uF ceramic output capacitor. Choose a loop gain crossover frequency of 35kHz, and place voltage compensator zero and pole at F Z=7kHz (20% of F C), and FP= 677kHz. From the equation in step 2, the required compensator gain at F C is shown by the following equation. Then the compensator parameters are 7.4k 10 3 0. 10 R 3 7 20 7 = × = − nF 1 . 3 10 4 . 7 10 7 2π 1 C 3 3 5 = × × × × = 32pF 10 4 . 7 10 677 π 2 1 C 3 3 8 = × × × × = Select R 7=7.32k, C5=3.3nF, and C8= 33pF for the design. Compensator parameters for various typical applications are listed in Table 4. 3. 4. 5. Thermal Considerations For the power transistor inside the SC4525F, the conduction loss P C, the switching loss PSW, and bootstrap circuit loss P BST, can be estimated using the following. O CESAT C I V D P × × = SW O IN S SW F I V t 2 1 P × × × × = 40 I V D P O BST BST × × = whereV BST is the BST supply voltage and tS is the equivalent switching time of the NPN transistor (see Table 3). Table 3 — Typical switching time In addition, the quiescent current loss is 2mA V P IN Q × = The total power loss of the SC4525F is therefore Q BST SW C TOTAL P P P P P = + + = The temperature rise of the SC4525F is the product of the total power dissipation (previous equation) and q JA (36oC/W), which is the thermal impedance from junction to ambient for the SOIC-8 EDP package. It is not recommended to operate the SC4525F above 25oC junction temperature. |
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