ACS70310 datasheet(15/27 Pages) ALLEGRO

15 / 27 page

Very High Precision, Programmable Linear Hall-Effect Sensor IC

with Reverse Battery Protection and High-Bandwidth (240 kHz)

Analog Output for Core-Based Current Sensing

ACS70310

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Memory-Locking Mechanisms

The ACS70310 is equipped with two distinct memory-locking

mechanisms:

• Default Lock: At power-up, all registers of the ACS70310

are locked by default. EEPROM and volatile memory cannot

be read or written. To disable Default Lock, a specific 32-bit

customer access code has to be written to address 0x36 within

Access Code Timeout (tACC = 10 ms) from power-up. After

doing so, registers can be accessed. If VCC is power-cycled,

the Default Lock will automatically be re-enabled. This

ensures that during normal operation, memory content will not

be altered due to unwanted glitches on VCC or the output pin.

• Lock Bit: After EEPROM has been programmed by the user,

the EELOCK bit can be set high and VCC power-cycled to

permanently disable the ability to read or write any register.

This will prevent the ability to disable Default Lock using

the method described above. Note that after the EELOCK

bit is set high and the VCC pin has been power-cycled, the

EELOCK bit can no longer be cleared and registers can no

longer be written to.

Serial Communication

The serial interface allows an external controller to read and

write registers, including EEPROM, in the ACS70310 using a

point-to-point command/acknowledge protocol. The ACS70310

does not initiate communication; it only responds to commands

from the external controller. Each transaction consists of a com-

mand from the controller. If the command is a write, there is no

acknowledging from the ACS70310. If the command is a read,

the ACS70310 responds by transmitting the requested data.

Serial interface timing parameters can be found in the Program-

ming Levels table (Table 1). Note that the external controller

must avoid sending a Command frame that overlaps a Read

Acknowledge frame.

The serial interface uses a Manchester-encoding-based protocol

per G.E. Thomas (0 = rising edge, 1 = falling edge), with address

and data transmitted MSB first. Four commands are recognized

by the ACS70310: Write Access Code, Write to Volatile Memory,

Write to Non-Volatile Memory (EEPROM) and Read. One frame

type, Read Acknowledge, is sent by the ACS70310 in response to

a Read command.

Synchronize

Bit boundaries

VMAN(L)

VMAN(H)

0 V

Memory Address

Data

CRC

Read/Write

0 0 0/1

0 0

0/1

Figure 12: General Format for Serial Interface Commands

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