ALS31313 datasheet(20/25 Pages) ALLEGRO

20 / 25 page

Automotive Grade, 3-D Linear Hall-Effect Sensor

with I2C Output and Advanced Low Power Management

ALS31313

Allegro MicroSystems, LLC

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Customer Write Access

An access code must be sent to the device prior to writing any of

the volatile registers or EEPROM in the ALS31313. If customer

access mode is not enabled, then no writes to the device are

allowed. The only exception to this rule is the sleep register,

which can be written regardless of the access mode. Furthermore,

any register or EEPROM location can be read at any time regard-

less of the access mode.

To enter customer access mode, an access command must be

sent via the I2C interface. The command consists of a serial write

operation with the address and data values shown in Table 16.

Once the customer access mode is entered, it is not possible to

change access modes without power-cycling the device. After

power up, there is no time limit to when the access code may be

entered.

Table 16: Customer Access Code

Access Mode

Address

Data

Customer Access

0x35

0x2C413534

Read Cycle Overview

The read cycle to access registers on ALS31313 is outlined in the

sequence below.

1. Master initiates Start Condition

2. Master sends 7-bit Slave address

and the write bit (0)

3. Master waits for ACK from ALS31313

4. Master sends 8-bit register address

5. Master waits for ACK from ALS31313

6. Initiate a Start Condition; this time it is

referred to as a Restart Condition

7. Master sends 7-bit Slave address

and the read bit (1)

8. Master waits for ACK from ALS31313

9. Master receives 31:24 bits of data

10. Master sends ACK to ALS31313

11. Master receives 23:16 bits of data

12. Master sends ACK to ALS31313

13. Master receives 15:8 bits of data

14. Master sends ACK to ALS31313

15. Master receives 7:0 bits of data

16. Master sends NACK to ALS31313

17. Master initiates Stop Condition

The I2C read sequence is further illustrated in the timing dia-

grams in Figure 6.

The timing diagram in Figure 6 shows the entire contents

(bits 31:0) of a single register location being transmitted. Option-

ally, the I2C Master may choose to replace the NACK with an

ACK instead, which allows the read sequence to continue. This

case will result in the transfer of contents (bits 31:24) from the

following register, address + 1. The master can then continue

acknowledging, issue the not-acknowledge (NACK), or stop after

any byte to stop receiving data.

Note that only the initial register address is required for reads,

allowing for faster data retrieval. However, this restricts data

retrieval to sequential registers when using a single read com-

mand. When the Master provides a non-acknowledge bit and stop

bit, the ALS31313 stops sending data. If nonsequential registers

are to be read, separate read commands must be sent.

D7 D6 D5 D4 D3 D2 D1 D0 AK D7 D6 D5 D4 D3 D2 D1 D0 AK

1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9

Slave Address

Read bit

Device (Slave) Acknowledge

SDA

SCL

D7 D6 D5 D4 D3 D2 D1 D0 AK D7 D6 D5 D4 D3 D2 D1 D0 AK

…

1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9

Slave Address

Write bit

Device (Slave) Acknowledge

Master Restart

Start

SDA

SCL

1 2 3 4 5 6 7 8 9

D7 D6 D5 D4 D3 D2 D1 D0 NAK

1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9

Device (Slave) Acknowledge

SDA

SCL

D7 D6 D5 D4 D3 D2 D1 D0 AK D7 D6 D5 D4 D3 D2 D1 D0 AK

Master Non-Acknowledge

Figure 6: I2C Read Timing Diagram

ALS31313 Datasheet(PDF) 20 Page - Allegro MicroSystems

ALS31313 Datasheet(HTML) 20 Page - Allegro MicroSystems

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25

Datasheet Download

Link URL