GD25LQ128DSFS datasheet(28/79 Pages) GIGADEVICE

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1.8V Uniform Sector

Dual and Quad Serial Flash

GD25LQ128D

Figure12. Quad I/O Fast Read Sequence Diagram (M5-4

≠ (1, 0))

Command

EBH

CS#

SCLK

SI(IO0)

SO(IO1)

9 10 11 12 13 14 15

16 17 18 19 20 21 22 23

A23-16 A15-8 A7-0

M7-0

WP#(IO2)

HOLD#(IO3)

Dummy

Byte1 Byte2

Figure12a. Quad I/O Fast Read Sequence Diagram (M5-4= (1, 0))

CS#

SCLK

9 10 11 12 13 14 15

SI(IO0)

SO(IO1)

WP#(IO2)

HOLD#(IO3)

A23-16 A15-8 A7-0

M7-0

Dummy

Byte1 Byte2

Quad I/O Fast Read with

“8/16/32/64-Byte Wrap Around” in Standard SPI Mode

The Quad I/O Fast Read command can be used to access a specific portion within a page by issuing

“Set Burst with

Wrap

” (77H) commands prior to EBH. The “Set Burst with Wrap” (77H) command can either enable or disable the “Wrap

Around

” feature for the following EBH commands. When “Wrap Around” is enabled, the data being accessed can be limited

to either an 8/16/32/64-byte section of a 256-byte page. The output data starts at the initial address specified in the command,

once it reaches the ending boundary of the 8/16/32/64-byte section, the output will wrap around the beginning boundary

automatically until CS# is pulled high to terminate the command.

The Burst with Wrap feature allows applications that use cache to quickly fetch a critical address and then fill the cache

afterwards within a fixed length (8/16/32/64-byte) of data without issuing multiple read commands. The

“Set Burst with Wrap”

command allows three

“Wrap Bits” W6-W4 to be set. The W4 bit is used to enable or disable the “Wrap Around” operation

while W6-W5 is used to specify the length of the wrap around section within a page.

Quad I/O Fast Read (EBH) in QPI Mode

The Quad I/O Fast Read command is also supported in QPI mode. See Figure12b. In QPI mode, the number of dummy

clocks is configured by the

“Set Read Parameters (C0H)” command to accommodate a wide range application with different

needs for either maximum Fast Read frequency or minimum data access latency. Depending on the Read Parameter Bits

GD25LQ128DSFS Datasheet(PDF) 28 Page - GigaDevice Semiconductor (Beijing) Inc.

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