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GD25LQ128DSFS Datasheet(PDF) 29 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD25LQ128DSFS Datasheet(HTML) 29 Page - GigaDevice Semiconductor (Beijing) Inc. |
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29 / 79 page ![]() 1.8V Uniform Sector Dual and Quad Serial Flash GD25LQ128D 29 P[5:4] setting, the number of dummy clocks can be configured as either 4/6/8/8. In QPI mode, the “Continuous Read Mode” bits M7-M0 are also considered as dummy clocks. “Continuous Read Mode” feature is also available in QPI mode for Quad I/O Fast Read command. “Wrap Around” feature is not available in QPI mode for Quad I/O Fast Read command. To perform a read operation with fixed data length wrap around in QPI mode, a dedicated “Burst Read with Wrap” (0CH) command must be used. Figure12b. Quad I/O Fast Read Sequence Diagram (M5-4= (1, 0) QPI) CS# SCLK IO0 IO1 IO2 IO3 0 1 2 3 4 5 Command EBH 20 12 16 8 6 7 8 9 10 4 4 0 0 4 0 4 0 4 21 13 17 9 5 5 1 1 5 1 5 1 5 22 14 18 10 6 6 2 2 6 2 6 2 6 23 15 19 11 7 7 3 3 7 3 7 3 7 A23-16 A15-8 A7-0 M7-0* 11 12 13 14 IOs switch from Input to output dummy* Byte1 Byte2 *"Set Read Parameters" Command (C0H) can set the number of dummy clocks |
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