GD25Q64CPJS datasheet(44/74 Pages) GIGADEVICE

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3.3V Uniform Sector

Dual and Quad Serial Flash

GD25Q64C

7.33. Read Security Registers (48H)

The Read Security Registers command is similar to Fast Read command. The command is followed by a 3-byte address

(A23-A0) and a dummy byte, and each bit is latched-in on the rising edge of SCLK. Then the memory content, at that

address, is shifted out on SO, and each bit is shifted out, at a Max frequency fC, on the falling edge of SCLK. The first byte

addressed can be at any location. The address is automatically incremented to the next higher address after each byte of

data is shifted out. Once the A9-A0 address reaches the last byte of the register (Byte 3FFH), it will reset to 000H, the

command is completed by driving CS# high.

Address

A23-16

A15-12

A11-10

A9-0

Security Register #1

00H

0 0 0 x

0 0

Byte Address

Security Register #2

00H

0 0 1 0

0 0

Byte Address

Security Register #3

00H

0 0 1 1

0 0

Byte Address

Figure 38. Read Security Registers command Sequence Diagram

Command

48H

CS#

SCLK

High-Z

9 10

28 29 30 31

23 22 21

24-bit address

MSB

34 35 36 37

38 39

Data Out1

42 43 44 45

46 47

Data Out2

CS#

SCLK

MSB

Dummy Byte

GD25Q64CPJS Datasheet(PDF) 44 Page - GigaDevice Semiconductor (Beijing) Inc.

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