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GD25Q64CPJS Datasheet(PDF) 60 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD25Q64CPJS Datasheet(HTML) 60 Page - GigaDevice Semiconductor (Beijing) Inc. |
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60 / 74 page ![]() 3.3V Uniform Sector Dual and Quad Serial Flash GD25Q64C 60 tRS Latency Between Resume And Next Suspend 100 μs tRST CS# High To Next Command After Reset (Except From Erase) 30 μs tRST_E CS# High To Next Command After Reset (From Erase) 12 ms tW Write Status Register Cycle Time 5 40 ms tBP1 Byte Program Time( First Byte) 30 80 us tBP2 Additional Byte Program Time ( After First Byte) 2.5 30 us tPP Page Programming Time 0.6 6 ms tSE Sector Erase Time(4K Bytes) 50 500 ms tBE1 Block Erase Time(32K Bytes) 0.2 2.0 s tBE2 Block Erase Time(64K Bytes) 0.3 4.0 s tCE Chip Erase Time(GD25Q64C) 40 160 s Note: 1. Typical value tested at T = 25℃. 2. Value guaranteed by design and/or characterization, not 100% tested in production. |
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