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ADPD144RI Datasheet(PDF) 4 Page - Analog Devices

Part # ADPD144RI
Description  PPG Optical Sensor Module with Integrated Red/IR Emitters and AFE
PDF  34 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADPD144RI Datasheet(HTML) 4 Page - Analog Devices

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ADPD144RI
Data Sheet
Rev. A | Page 4 of 34
Parameter
Test Conditions/Comments
Min
Typ
Max
Unit
LEDs
LED Peak Current Setting
Adjustable via Register 0x23 through Register 0x25 settings
(see Table 14)
8.5
370
mA
Dominant Wavelength
Red LED (LED1)
Forward current of the diode (IF) = 20 mA
660
nm
Infrared (IR) LED (LED2)
IF = 100 mA
880
nm
Radiant Flux
Red LED, IF = 20 mA at 25°C
9
mW
IR LED, IF = 100 mA at 25°C
33
mW
PHOTODIODE3
Responsivity
Wavelength, λ = 660 nm (Channel 1, Channel 2, Channel 3)
0.36
A/W
Wavelength, λ = 660 nm (Channel 4)
0.31
A/W
Wavelength, λ = 880 nm (Channel 1, Channel 2, Channel 3)
0.25
A/W
Wavelength, λ = 880 nm (Channel 4)
0.28
A/W
Active Area
Individual Photodiodes
Per channel
0.3
mm2
Total Active Area
1.2
mm2
POWER SUPPLY VOLTAGES
The ADPD144RI does not require a specific power-up sequence
VDD
Applied at the VDD1 pin and VDD2 pin
1.7
1.8
1.9
V
VLED4, 5
Applied at the VLED pin
3
3.5
4.3
V
Power Supply Rejection Ratio (PSRR)
VDD = 1.8 V
−37
dB
OPERATING TEMPERATURE RANGE
−40
+85
°C
1
Saturation illuminance refers to the amount of light that saturates the analog signal path. Actual results may vary by factors of up to 2× from the typical specifications.
As a point of reference, Air Mass 1.5 (AM1.5) sunlight (brightest sunlight) produces 100 kLux.
2
Blackbody color temperature (T = 5800 K) approximates solar radiation (sunlight).
3
The photodiode layout is shown in Figure 11.
4
VLED must be sufficient to source the maximum IF required and to keep the internal driver and current sink compliance voltage at least 0.2 V above LGND. For the
integrated LEDs, this voltage appears at the LEDX1 and LEDX2 pins.
5
See Figure 8 for the current limitation at the minimum VLED.
I2C DIGITAL INPUT/OUTPUT SPECIFICATIONS
Table 3.
Parameter
Symbol
Test Conditions/Comments
Min
Typ
Max
Unit
LOGIC INPUTS (SCL, SDA)
Input Voltage
High Level
VIH
0.7 × VDD
3.6
V
Low Level
VIL
0.3 × VDD
V
Input Current
High Level
IIH
−10
+10
µA
Low Level
IIL
−10
+10
µA
Input Capacitance
CIN
10
pF
LOGIC OUTPUTS
INT Output Voltage
High Level
VOH
2 mA high level output current
VDD − 0.5
V
Low Level
VOL
2 mA low level output current
0.5
V
SDA Output
Low Level Voltage
VOL1
2 mA low level output current
0.2 × VDD
V
Low Level Current
IOL
VOL1 = 0.6 V
6
mA



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