V

IN

Integrator 1

Integrator 2

0 V

DAC

V

1

V

2

V

4

V

5

V

3

CMP

f

CLKIN

3

2

1

0

-1

-2

3.25

3.5

3.75

4

4.25

5.5

VDD (V)

3

4.5

5

4

Range

3

2

1

0

-1

-2

3.25

3.5

3.75

4

4.25

5.5

VDD (V)

3

4.5

5

4

Range

13

AMC1336

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SBAS951 – AUGUST 2019

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Feature Description (continued)

Figure 7. Common-Mode Input Voltage Range With a

Full-Scale Differential Input Signal of ±1.25 V

Figure 8. Common-Mode Input Voltage Range With a

Zero Differential Input Signal

There are two restrictions on the analog input signals (AINP and AINN). First, if the input voltage exceeds the

range AGND – 5 V to AVDD + 0.5 V, the input current must be limited to 10 mA because the device input

electrostatic discharge (ESD) diodes turn on. In addition, the linearity and noise performance of the device are

ensured only when the differential analog input voltage remains within the specified linear full-scale range (FSR)

and within the specified input common-mode range.

7.3.2 Modulator

The modulator implemented in the AMC1336, as conceptualized in Figure 9, is a second-order, switched-

opposite direction and forcing the value of the integrator output to track the average value of the input.

Figure 9. Block Diagram of a Second-Order Modulator