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9883 Datasheet(PDF) 55 Page - Intel Corporation |
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9883 Datasheet(HTML) 55 Page - Intel Corporation |
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55 / 56 page ![]() Advanced 10/100 Unmanaged Repeater — LXT9883/9863 Datasheet 55 Document #: 249115 Revision #: 003 Rev. Date: 08/07/01 Figure 25. 10 Mbps IRB-to-TP Port Timing Table 34. 10 Mbps IRB-to TP Port Timing Parameters Parameter Symbol Min Typ 1 Max Units 2 Test Conditions MACACTIVE to IR10ENA assertion delay 3 t14A – 100 – ns MACACTIVE High to IR10ENA Low. 4 IR10DAT (input) to IR10CLK setup time t14B – 20 – ns IR10DAT valid to IR10CLK rising edge. 4 IR10CLK to IR10DAT (input) hold time t14C – 0 – ns IR10CLK rising edge to IR10DAT change. 4 IR10ENA asserted to TPOP/N active t14D 5 5.1 6 BT – 1. Typical values are at 25° C and are for design aid only; they are not guaranteed and not subject to production testing. 2. Bit Time (BT) is the duration of one bit as transferred to/from the MAC and is the reciprocal of bit rate. BT for 10BASE-T = 10 -7 s or 100ns. 3. External devices should allow at least one 10 MHz clock cycle (10 ns) between assertion of MACACTIVE and IR10ENA. 4. Input. MACACTIVE IR10ENA IR10DAT t14A t14B IR10CLK t14C TPOP/N t14D |
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