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TMS29F010-12CSFML Datasheet(PDF) 16 Page - Texas Instruments

Part # TMS29F010-12CSFML
Description  131072 BY 8-BIT FLASH MEMORY
PDF  36 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMS29F010-12CSFML Datasheet(HTML) 16 Page - Texas Instruments

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TMS29F010
131072 BY 8-BIT
FLASH MEMORY
SMJS840A – NOVEMBER 1997 – REVISED JUNE 1998
16
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251–1443
timing requirements controlled by W (see Figure 4, Figure 7, Figure 9, Figure 11, Figure 13,
Figure 15, and Figure 17) (continued)
ALTERNATE
’29F010-10
’29F010-12
UNIT
SYMBOL
MIN
TYP
MAX
MIN
TYP
MAX
UNIT
tAVAV
Cycle time, write
tc(W)
100
120
ns
tWHWH1 Cycle time, programming operation
tc(W)PR
18
18
µs
tWHWH2 Cycle time, sector-erase operation
1
15
1
15
s
tWHWH3 Cycle time, chip-erase operation
2
60
2
60
s
tWLAX
Hold time, address
th(A)
45
50
ns
tWHDX
Hold time, data valid after W high
th(D)
0
0
ns
tWHEH
Hold time, E
th(E)
0
0
ns
tWHWL
Pulse duration, W high
tw(WH)
20
20
ns
tWLWH1
Pulse duration, W low
tw(WL)
45
50
ns
tWLWH2
Pulse duration, W low (see Note 9)
100
100
µs
tWLWH3
Pulse duration, W low (see Note 10)
10
10
ms
tGHWL
Recovery time, read-before-write
trec(R)
0
0
ns
tAVWL
Setup time, address
tsu(A)
0
0
ns
tDVWH
Setup time, data
tsu(D)
45
50
ns
tAVGH
Setup time, A0 and A6 low and A1 high to G high
(see Note 9)
0
0
ns
tAVGEH
Setup time, A0 low and A1 and A6 high to G and E
high (see Note 10)
0
0
ns
tELWL
Setup time, E
tsu(E)
0
0
ns
tGHWH
Setup time, G
0
0
ns
tVCEL
Setup time, VCC
50
50
µs
tEHVWL
Setup time, E VID to W (see Note 10)
4
4
µs
tGHVWL
Setup time, G VID to W (see Notes 9 and 10)
4
4
µs
tWHAH
Setup time, W high to A6 going high (see Note 10)
0
0
ns
tHVT
Transition time, VID (see Notes 9 and 10)
4
4
µs
NOTES:
9. Sector-protect timing (see Figure 15)
10. Sector-unprotect timing (see Figure 17)



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