STM32H742AI datasheet(88/357 Pages) STMICROELECTRONICS

88 / 357 page

Pin descriptions

STM32H742xI/G STM32H743xI/G

88/357

DS12110 Rev 7

175

207

PI6

I/O

FT_h

TIM8_CH2, SAI2_SD_A,

FMC_D28, DCMI_D6,

LCD_B6, EVENTOUT

176

208

PI7

I/O

FT_h

TIM8_CH3, SAI2_FS_A,

FMC_D29, DCMI_D7,

LCD_B7, EVENTOUT

VSS

K10

M15

VSS

1. When this pin/ball was previously configured as an oscillator, the oscillator function is kept during and after a reset. This is

valid for all resets except for power-on reset.

2. This ball should remain floating.

3. This ball should not remain floating. It can be connected to VSS or VDD. It is reserved for future use.

4. This ball should be connected to VSS.

5. Pxy_C and Pxy pins/balls are two separate pads (analog switch open). The analog switch is configured through a SYSCFG

6. There is a direct path between Pxy_C and Pxy pins/balls, through an analog switch. Pxy alternate functions are available on

Pxy_C when the analog switch is closed. The analog switch is configured through a SYSCFG register. Refer to the product

reference manual for a detailed description of the switch configuration bits.

7. VREF+ pin, and consequently the internal voltage reference, are not available on the TFBGA100 package. On this package,

this pin is double-bonded to VDDA which can be connected to an external reference. The internal voltage reference buffer is

not available and must be kept disabled

8. When it is not available on a package, the VDDLDO pin is internally tied to VDD.

Table 9. Pin/ball definition (continued)

Pin/ball name

Pin name

(function

after

reset)

Alternate functions

Additional

functions

STM32H742AI Datasheet(PDF) 88 Page - STMicroelectronics

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