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STM32H742AI Datasheet(PDF) 307 Page - STMicroelectronics |
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STM32H742AI Datasheet(HTML) 307 Page - STMicroelectronics |
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307 / 357 page ![]() DS12110 Rev 7 307/357 STM32H742xI/G STM32H743xI/G Electrical characteristics (rev V) 322 SPI interface characteristics Unless otherwise specified, the parameters given in Table 205 for SPI are derived from tests performed under the ambient temperature, fPCLKx frequency and VDD supply voltage conditions summarized in Table 122: General operating conditions, with the following configuration: • Output speed is set to OSPEEDRy[1:0] = 11 • Capacitive load CL = 30 pF • Measurement points are done at CMOS levels: 0.5VDD • IO Compensation cell activated. • HSLV activated when VDD ≤ 2.7 V • VOS level set to VOS1 Refer to Section 7.3.15: I/O port characteristics for more details on the input/output alternate function characteristics (NSS, SCK, MOSI, MISO for SPI). Table 205. SPI characteristics(1) Symbol Parameter Conditions Min Typ Max Unit fSCK SPI clock frequency Master mode 1.62<VDD<3.6 V SPI1, 2, 3 -- 80 MHz Master mode 2.7<VDD<3.6 V SPI1, 2, 3 100 Master mode 1.62<VDD<3.6 V SPI4, 5, 6 50 Slave receiver mode 1.62<VDD<3.6 V 100 Slave mode transmitter/full duplex 2.7<VDD<3.6 V 31 Slave mode transmitter/full duplex 1.62 <VDD<3.6 V 29 tsu(NSS) NSS setup time Slave mode 2 - - - th(NSS) NSS hold time Slave mode 1 - - tw(SCKH), tw(SCKL) SCK high and low time Master mode TPCLK-2 TPCLK TPCLK+2 |
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