8XC151SASB HIGH-PERFORMANCE CHMOS MICROCONTROLLER

Symbol

Parameter

Min

Typical

Max

Units

Test Conditions

Output High Voltage

V

(Port 0 in External

Address)

Output High Voltage

V

(Port 2 in External

Address during Page

Mode)

Logical 0 Input Cur-

b

50

m

rent (Port 1 2 3)

Input Leakage Cur-

g

10

m

A

rent (Port 0)

Logical 1-to-0 Transi-

b

650

m

tion Current (Port 1

2 3)

RST Pulldown Resistor

40

225

kX

Pin Capacitance

10

pF

(Note 4)

Powerdown Current

10

k

20

m

A

(Note 4)

Idle Mode Current

13

20

mA

(Note 4)

Operating Current

71

85

mA

(Note 4)

NOTES

10 mA

port 0

26 mA

ports 1 – 3

15 mA

all output pins

71 mA

greater than the listed test conditions

2 Capacitive loading on ports 0 and 2 may cause spurious noise pulses above 04V on the low-level outputs of ALE and

ports 1 2 and 3 The noise is due to external bus capacitance discharging into the port 0 and port 2 pins when these

pins change from high to low In applications where capacitive loading exceeds 100 pF the noise pulses on these

signals may exceed 08V It may be desirable to qualify ALE or other signals with a Schmitt trigger or CMOS-level input

logic

to drop below the specification when the

address lines are stabilizing

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